资源列表
async_receiver
- Asynchronous receiver
fifo
- A First in first out buffer in Verilog
BEIHANGVerilogjiaocheng
- 北航Verilog教程. Verilog HDL基本结构 数据类型及常量、变量 运算符及表达式 语句 赋值语句和块语句 条件语句 ... -BUAA Verilog Tutorial. Verilog HDL data types and the basic structure of constants, variables and expression operator assignment statements and conditional stat
fft
- 基于FPGA的FFT的硬件实现。其中含有部分vhdl程序，本论文采用基4FFT算法-FPGA-based hardware implementation of the FFT. Vhdl part which contains the procedures used in this paper-based algorithm 4FFT
FPGA_SEG7_V4
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
C20_sram_vga
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
C20_SD
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
4
- Verilog写的 8 位超前进位加法器-Verilog write 8-bit CLA
CC2500programmingusingAlteraFPGA
- This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
video_control_procedure
- 用VHDL实现视频控制程序(实现对图像的采集和压缩)-Using VHDL video control procedures (the achievement of the image acquisition and compression)