资源列表
full11adder
- this is a full adder using VHDL it s really helpful
cpu-16-vhdl
- 用vhdl语用实现简单的16位cpu功能-Pragmatic use vhdl simple function of 16-bit cpu
e002_synopsys
- sysnopsys的cocentric软件及system C使用说明-cocentric the sysnopsys software and use system C
oc8051_verilog
- 兼容8051的内核oc8051,verilog版本的-8051-compatible core oc8051, verilog version of
count2
- 2位并行加法器初学者必看初步了解FPGA-two count
dds1
- 数字合成函数发生器 初学者最好的教程DDS-dds
top_vga
- 产生VGA彩条信号(Verilog 语言)-Generate VGA signal
DP8051_FREE
- Free 8051 core upload
_8bitcpu
- 8 bit cpu vhdl design code not tested
dlx
- DLX CPU VHDL CODE UNIVERSITY
work
- A8255的vhdl源代码,比较简单的一个-Vhdl source code of A8255
vhdl
- VHDL的经典教程,深入浅出,对VHDL的入门很有帮助-VHDL Tutorial classic, easy, helpful entry on the VHDL
