资源列表
VerilogfoFPGAbasedSDRAMController
- 使用Verilog实现基于FPGA的SDRAM控制器-The use of Verilog for FPGA-based SDRAM Controller
ddsphase
- 低频数字相位测量仪仿真的软件部分，是由VHDL语言设计-Low-frequency digital phase-measuring instrument simulation software is designed by VHDL language
eight_decimal
- 用VERILOG写的8位十进制频率计 注释非常清晰 有助菜鸟学习-VERILOG written with eight decimal Notes Cymometer help rookie learning very clear
rd1007_vhdl
- 标准sdram控制器, 很容易改写后应用-standard sdram controllor, easy to reuse
System09_latest[1].tar
- This SOC system 09. Source code. very use fulcode for SOC beginners-This is SOC system 09. Source code. very use fulcode for SOC beginners
lcd
- exemple vhdl couter to lcd
LCD-VHDL
- LCD的控制程序，采用硬件描述语言VHDL编写，里面还有仿真结果，是不可多得的学习材料-LCD control procedure for the preparation of the hardware descr iption language VHDL, along with simulation results, the learning materials are hard to come by
MODELSIM
- MODELSIM的经典教程，可以快速学会MODELSIM的一些基础应用-MODELSIM classic course, can quickly learn to MODELSIM application of some basic
MTDB_SYSTEM_CD_V1.0
- ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesiz
DW8051_ALL
- 包中包括, DW8051完整的Verilog HDL代码 两本手册: DesignWare Library DW8051 MacroCell, Datasheet DesignWare DW8051 MacroCell Databook 三篇51论文: 基于IP 核的PSTN 短消息终端SoC 软硬件协同设计 Embedded TCP/ IP Chip Based on DW8051 Core 以8051为核的SOC中的万年历的设计 -DW8051 is desi
Alarm
- 用verilog HDL 写的时钟程序，在DE2上实现了。-Alarm program based on Verilog HDL, run on DE2 Board
light
- 用VHDL语言实现交通灯的设计,并与硬件相连接.-VHDL language with the design of traffic signals, and connected with the hardware.