资源列表
laser_timer
- laser timer source and test bench code 4
vsim
- flii adder wave form 3
traffic_control_tb
- traffic controller verilog test bench code 2
traffic_control
- traffic controller verilog source code 1
sdram_demo_de2_115
- 适用于DE2 115开发板的SDRAM测试代码，基于黑金开发板改编，可以直接下载到DE2 115上面。内部有所有代码解释-FPGA SDRAM_TEST DE2 115
Multiplier
- 4 bit multiplier 4 bit multiplier 4 bit multiplier-4 bit multiplier 4 bit multiplier 4 bit multiplier 4 bit multiplier
DIV_PWM
- 这是简单的vhdl pwm的例程，适合新手学习-This is a simple vhdl pwm routines, suitable for beginners to learn
sonic
- 基于FPGA的超声波测距，通过数码管显示距离-FPGA-based ultrasonic distance
fifo
- 深度256的异步fifo 使用verilog语言编写的，能够实现简单的读写，存储功能！-256 the depth of asynchronous FIFO
VHDL
- 设计一个具有进位输入和进位输出的8位行波进位加法器-8-bit ripple carry adder design having a carry input and a carry output
migongtest
- 用quartus2实现一个迷宫游戏。界面在8×8点阵上进行。程序开始后 倒计时5秒进入迷宫地图。选择上下左右控制走出迷宫，撞墙人物不动。数码管倒计时30s.30秒内走出迷宫则显示成功，30s内未走出或出界则显示失败-Quartus2 achieve with a maze game. Interface performed on 8 × 8 dot matrix. Countdown to 5 seconds after the beginning of the program into the
FPGA_led
- fpga 一个简单的学习例子。动态数码管，很简单的。-fpga learning a simple example. Dynamic digital control, very simple.