资源列表
dtsmg
- 动态数码管的实时显示和应用，主要是实现一个简单的没有控制位的时分秒的数字钟；六位数码管的前两位实现小时；三四位显示分钟；最后两位显示秒。主要有四个模块。-Real-time display and application of dynamic digital tube, primarily to implement a simple no control bits when every minute digital clock six digital realization of the fi
Bucket-shift-register
- 桶型移位寄存器。主要实现循环移位功能。模块单一化，有助于移植，并方便使用人员快速理解并应用-Bucket shift register.The main realization of cyclic shift function.Single module, help to transplant, and easy to use personnel to quickly understand and apply
VHDL-clock
- 用VHDL写的数字钟程序，能够实现显示时分秒，时间可以调节，还能设定闹钟-Written in VHDL,the digital clock procedures can display every minute, the time can be adjusted, but also to set the alarm
modulation-and-demodulation
- 调制与解调系统的FPGA设计实现,包括2-ASK调制和解调,2-FSK调制和解调,2-PSK调制和解调,QPSK调制和解调,PPM调制和解调的verilog源代码。-FPGA design implementation of modulation and demodulation system, including 2-ASK modulation and demodulation, 2-FSK modulation and demodulation, 2-PSK modulation and
MultHalfBand
- 多级半带滤波器的FPGA实现,采用6级滤波器实现的采样频率由3200Hz降为50Hz的抽取系统，前5级为半带滤波器,最后一级为普通FIR滤波器-Multi-level half-band filter FPGA, using six filters for sampling frequencies 50Hz down to 3200Hz extraction system for the front five and a half-band filter, the last stage of
MultCIC
- 三级梳状积分CIC滤波器的FPGA实现代码，包括积分模块，抽取模块和梳状模块以及顶层模块的实现代码-Three integral CIC comb filter FPGA implementation code, including the integration module, extraction module and a comb and a top-level module module implementation code
wcdma.v
- 无线通信FPGA设计例13-6源代码，WCDMA系统小区搜索的FPGA实现 -Example 13-6 FPGA design of wireless communication source code, FPGA implementation of WCDMA system cell search
RLS.v
- 用verilog实现的一个2抽头RLS自适应滤波器的代码-A realization with verilog HDL code of a two-tap RLS adaprive fliter
MD5
- 哈希算法FPGA实现代码，采用MD5算法，并给出了仿真波形。-MD5 hashing algorithm for FPGA implementation code
keyboard
- 这个程序是我们课题组对键盘板的FPGA的总结，传上去，希望对大家有用-This program is a summary of our group keyboard FPGA board, and pass up, I hope useful
verilog-hdl(Quartus)
- 一个关于Quartusii的软件使用教程，包括Modelsim的仿真教程，比较简单-About Quartusii software tutorials, including Modelsim simulation tutorial, relatively simple
Norflash
- 用verilog hdl写的Norflash控制器，可实现单字节读写，扇区擦除。-Norflash controller edit by Verilog hdl,it can read or write by Byte,or erase the sector.