资源列表
cnt1_fenpin
- 基于vhdl的任意分频程序，可调占空比，-Based on an arbitrary dividing vhdl procedures, adjustable duty cycle,
lcd12864_hanzi_zifu
- 基于vhdl的12864 字符和汉字显示程序，带字库，亲测可用-Based vhdl 12,864 characters and character display program, with character, pro-test available
hello_sd
- 基于fpga verilog 语言和nios ii实现的spi模式下sd卡驱动，以及加入znfat文件系统的sd卡驱动，可读取sd卡内的文件。-Based on the language and under the fpga verilog realize spi mode nios ii sd card driver, and adding znfat sd card file system driver, you can read files sd card.
DE0_NANO_SDRAM_Nios_Test
- SDRAM Test by Niios II Many applications use SDRAM to provide temporary storage. In this demonstration hardware and software designs are provided to illustrate how to perform memory access in QSYS. We describe how the Altera’s SDRAM Controller IP is
DE0_NANO_SDRAM_Nios_Test
- SDRAM Test by Niios II Many applications use SDRAM to provide temporary storage. In this demonstration hardware and software designs are provided to illustrate how to perform memory access in QSYS. We describe how the Altera’s SDRAM Controller IP is
all_test_3
- FPGA芯片开发板对应器件测试程序，包括led，按键，AD/DA等多种器件-FPGA chip development board corresponding device testing procedures, including led, buttons, AD/DA and other devices
spi_mcu
- SPI Slave接口，实现与外部控制器的接口。实现外部SPI口到逻辑内部寄存器模块接口的转换-SPI Slave interface, interface with external controller. SPI port to achieve external conversion logic module interface internal registers
Zynq_AMP_Example
- ZYNQ 平台搭建，ZYNQ芯片的应用，初学者有一定的帮助-ZYNQ platform to build, ZYNQ chip applications. Beginners will certainly help
dds
- FPGA所需要的DDS源码，可实现波形输出，采用VHDL语言，简单易懂。-FPGA need DDS source waveform output can be achieved using VHDL language, easy to understand.
FPGA2
- 基于FPGA的8位输入，3位输出高位优先编码器-Based on the FPGA 8-bit input, three output high priority encoder
FPGA1
- 基于FPGA的多路复用器，4通道8位带三态类型-Multiplexer, 4 channel 8 bits with three states type
module-dapeng
- 本代码基于FPGA实现了计时范围：00’00”00 ~ 59’59”99，显示的最长时间为59分59 秒的功能。数字秒表的计时精度是10ms。显示工作方式：a、用八位数码管显示读数 b、用两个按钮开关（一个按钮使秒表复位，另一个按钮控制秒表的启动/暂停）-This code based on FPGA to realize the timing range: 00 00 00 ~ 59 59 "99," according to the function of the maximum