资源列表
an_jian_xiao_dou
- 基于FPGA的按键消抖设计代码，能实现按键消抖功能-Key debounce FPGA-based design code, to achieve key debounce function
10010_xu_lie_jian_ce_qi
- 基于FPGA的序列检测器，能检测10010序列-FPGA-based sequence detector can detect a sequence 10010
VGA_256
- 基于FPGA的VGA驱动，能在显示器上实现256色-FPGA-based VGA driver to achieve 256 colors on the display
CLK_TEST
- VHDL实现的8分频程序，经测试，在板上运行成功-8 divided clock
CameraLink_Oserdes2_test
- 40M时钟输入经过iserdes倍频到960M-input 40M o clock and output 960M
structural
- 4:2 ENCODER USING STRUCTURAL MODELING
dataflow
- 4:2 encoder using data flow modeling
behavioral
- 8:3 encoder using behavioral modeling
Video-and-Image-Processing-Suite
- 视频图像处理方法介绍altera公司相关文章-Video image processing method described in
verilog
- 《verilog_数字系统设计课程》(第二版)思考题答案-" Verilog_ Digital System Design Course" (Second Edition) Questions answers. Rar
zuoye60
- 基于VHDL的60S倒计时设计，附带数码管显示，倒计时完成后蜂鸣器报警-60S countdown VHDL-based design, with a digital display, the countdown is completed after the buzzer alarm
huxideng
- 基于VHDL的呼吸灯设计， 可设置4个频率分别为0.1 ，0.2，0.4 0.5MHZ，quartus软件亲测可用-VHDL-based design breathing light can be set to four frequencies were 0.1, 0.2,0.4 0.5MHZ, quartus software pro-test available