搜索资源列表
yiwei
- ４位移位寄存器ＶＨＤＬ语言实现，描述７４１９４的功能-4-bit shift register VHDL language to describe the functions of 74,194
lshifter
- 有时为了处理数据，需要将寄存器中的各位数据在移位控制信号作用下，依次向高位或向低位移动1位成为移位寄存器-Sometimes in order to process the data, you need to register in the role of data in the shift control signals, the order of low to high or to move one into the shift register
mover
- 4位移位寄存器的VHDL代码包含代码及图形仿真-4-bit shift register of the VHDL code
hc595
- 74hc595移位寄存器的驱动程序，用于LED阵列显示。-74hc595 shift register driver for the LED array display.
shift_reg
- 移位寄存器，Verilog实现，有实验说明文档。-Shift register, Verilog implementation, there is experimental documentation.
SHIFTER
- SHIFTER描述移位寄存器的功能以及VHDL硬件语言的实现-SHIFTER describe the functions of the shift register and the realization of VHDL hardware language
pn
- 通过移位寄存器的方法产生m序列。已编译好！-Produced by the method m shift register sequence. Has been compiled!
verilogcode
- Verilog语言实现的多路选择器和移位寄存器的源代码.-Verilog language implementation of MUX and the shift register the source code.
msequence
- 针对七位移位寄存器进行设计，并对语句进行了详细的解释，希望对大家有帮助。-Shift register is designed for seven, and the statement is a detailed explanation, we want to help.
EDA
- 用EDA实现串行输入并行输出的移位寄存器，附带仿真-Serial Input with EDA parallel output shift register, with simulation
32bitshiftregister
- 32位带锁存移位寄存器,采用verilog HDL语言编写，可用于串并转换-32-bit shift register with latches, using verilog HDL language can be used for string and convert
shift8
- 用VHDL语言在QUARTUS环境下开发，功能是并串转换移位寄存器-Using VHDL language QUARTUS development environment, and the string conversion function is the shift register
7shifter
- 基于verilog语言的七位移位寄存器编程代码，现代移动数字通信系统中编码器使用了-shifter
lfsr
- 用VerilogHDL编写的lfsr移位寄存器，可以综合。-Lfsr prepared with VerilogHDL shift register, can be summarized.
04
- 串行通讯做移位寄存器用用595芯片来控制数码管-Do shift register with serial communications chip 595 to control the use of digital control
LFSR
- 通过实现简单的线性反馈移位寄存器（LFSR），理解LFSR的工作原理、本原多项式重要意义-By implementing a simple linear feedback shift register (LFSR), to understand the working principle of LFSR, primitive polynomial significance
m
- m序列举例。4级移位寄存器生成周期为15的m序列。-m sequence example. 4 shift register generating the m sequence of 15 cycles.
6
- 1、for、while循环； 2、添加移位寄存器，根据n！逻辑结构搭建循环结构；-1, for, while loop 2, add the shift register, according to n! Logical structure built loop structure
verilog
- verilog编程中的基本程序，包括比较器，编码器，解码器，移位寄存器等-verilog programming in the basic procedures, including comparators, encoders, decoders, shift registers, etc.
FLch3RLSEG3
- 基于四个移位寄存器的最小二乘递推算法辨识程序-Shift register based on the four identification procedures recursive least squares algorithm