资源列表
halfband
- verilog写的39阶通带为20KHz的半带fir滤波器，经测试正确。-verilog halfband FIR
risc
- RISC（reduced instruction setcomputer，精简指令集计算机）是一种执行较少类型计算机指令的微处理器。改源码是vhdl语言，能在FPGA上跑。-RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL s
microblaze_pwm
- spartan3e microblaze 定时器使用的一个源代码-spartan3e microblaze timer using a source code
Xil3S1800ADSP_Rev1_serial_flash_config_v10.1.03.zi
- spartan3adsp spi flash-spartan3adsp spi flash loader
verilogcode
- 这是用于xilinx virtex-2 pro产品的误码仪方案verilog HDL代码-verilog code for bit-error rate tester
cam
- 这是使用 fpga实现CAM功能的介绍。用VHDL语言实现。-This is the use of the use of FPGA implementation introduce CAM function. Implementation using VHDL language.
RAM
- 用VerilogHDL写的ram程序，对初学者会有帮助。-Writing the ram with VerilogHDL procedures will be helpful for beginners.
PCMencoder
- 根据PCM编码特点，利用VHDL来设计出采编器；本设计为码率2Mbs，子长为8位，帧长100位。-According to the characteristics of PCM coding，here we use VHDL to design a editing device。
barrel_shifter
- VHDL实现的桶型移位器，能在一个时钟周期实现对数据的（0－12位）算术右移-VHDL implementation of a barrel—shifter, able to achieve at one clock cycle of data (0-12 bit) Arithmetic Shift Right
NANDFLASH
- 用VHDL开发的NANDFLASH的读写程序,给出 NANDFLASH的时序正确的读写-NANDFLASH developed using VHDL to read and write the procedures, timing NANDFLASH give the correct reading and writing
jpeg.tar
- This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is no
XC4VLX40_FGPA
- 使用xinlinx的XC4VLX40_FGPA编写的串口程序-XC4VLX40_FGPA of xinlinx, the seiral communication program