资源列表
float_add_module
- verilog编写的32位浮点数加法器。Start_Sig 和Done_Sig 是控制信号，作为启动和反馈完成，A 和B 是32 位宽的操作数输入信号，Result 则是32 位宽的输出结果。-32bits float add module use Verilog HDL.
aes3_rev1.0
- AES3在altera FPGA上开发的参考案例-AES3 Reference Design v1.0 The AES3/EBU reference design provides both a transmitter and a receiver. The receiver extracts the data and the clock an incoming AES3/EBU stream and stores the parallel audio data and
DS28E01_final
- 基于SHA-1算法和DS28E01加密芯片的FPGA系统设计，该上传文件为整个设计的系统文件。Quarter软件编程的Verilog程序，包含仿真调试界面。-Design of FPGA system based on SHA-1 algorithm and DS28E01 encryption chip。
mt9v034
- MT9v034芯片的控制程序,请放心下载， 请放心下载-MT9v034 chip control procedures，Please feel free to download，Please feel free to download，Please feel free to download
UART_BACK_kc705
- xilinx的KC705串口收发程序，已上板验证过-UART program
AWGN_VerilogDesign-master
- 加性高斯白噪声生成的VERILOG实现，包含所有的testbench文件。可直接使用-Additive white gaussian noise generated VERILOG realized, including all testbench files. Can be used directly
axi_jesd204b
- ADI JESD204接口的ADC与Xilinx FPGA接口IP，包含Verilog和VHDL源代码，AXI总线接口，ADC串行控制接口-ADI IP for interfacing JESD204 ADC to Xilinx FPGA, include Verilog/VHDL source code, AXI interface and serial config interface
DS1302
- 基于板载DS1302的电子时钟设计 AX301开发板上配置了一片实时时钟（RTC）芯片，型号DS1302。学习和掌握DS1302的基本原理，并完成电子时钟的设计。 要求：（1）用数码管显示时，分，秒； （2）有时间预置功能；-Design of Electronic Clock Based on Onboard DS1302 AX301 development board is equipped with a real-time clock (RTC) chip, model
last
- verilog，FPGA的TDC电路设计-verilog ，TDC base on FPGA
FUZZY
- verilog 模糊PID 通过修改MIF文件 可以完成单个参数整定-FUZZY pid by verilog HDL
ip核
- 购买的beckoff公司的ip核，提供了详细的datasheet以及协议说明，附上调用ip核的文件，采用verilog编写，平台可以在ISE里自己设置(Buy the beckoff company's ip kernel, provides a detailed datasheet and protocol descr iption, attached to the ip kernel file, using verilog prepared, the platform can be set
niosii-triple-speed-ethernet-4sgx230-qsys-131
- Altera公司出的三速以太网例程，工程编译完了可以用niosii直接生成simple_socket_server，希望有用。(Altera company out of the three speed Ethernet routines, engineering finished, you can directly generate simple_socket_server using NiosII, I hope useful.)