资源列表
JBD
- 基本的D触发器，可实现基本的保持功能。输入到输出不变。(The basic D flip flops enable basic retention functions. Input to output remain unchanged.)
T_0D
- 带同步清0、同步置1的D触发器模块。希望能够帮到大家。(D trigger module with synchronous clear 0 and synchronous setting 1. I hope I can help you.)
Y_0D
- 带同步置1、异步清0的D触发器。详细的讲解，易懂。(D flip-flop with synchronous 1 and asynchronous clear 0. Detailed explanation, easy to understand.)
m_manche
- 有关于M序列的曼彻斯特编码，亲自验证有效。(The Manchester code of the M sequence is personally validated.)
diver
- 根据芯片的始终频率进行分频，可调节占空比。容易实现。(The frequency division is carried out according to the chip frequency at all times, and the duty cycle is adjusted. Easy to implement.)
DDS
- 基于FPGA的DDS正弦信号设计，文件中有源代码(Design of DDS based on FPGA)
nbwpm
- Data packet transfer source program, Chaos indicator for Lyapunov index calculation, Really is a good program.
i2c_latest.tar
- 基于verilog的I2C接口协议代码，支持EEPROM(Verilog based I2C interface protocol code, support EEPROM)
SEQ_DETECTOR
- 这是一个四位串行数据检测器，一共有三种模式可以选择：递增（检测连续四位递增序列），递减（检测连续四位递减序列）和不变（检测连续四位不变序列）。整个设计采用同步时钟，异步复位，用米利状态机，并配置好了仿真环境和仿真文件。(This is a four bit sequence detector, including three modes that can be selected: increment mode (detecting four consistency increment data)
FMT
- 基于vhdl设计的数字频率计，后面还加了个与fpga通信的模块(Digital frequency meter based on VHDL design, and later added a module to communicate with FPGA)
he
- 利用VHDL实现判向计数器，并且在数码管上实现显示。可以在XILINX开发板上实现对应功能，仿真也能实现。(The use of VHDL realize the counter counter, and in the digital tube to achieve display. The corresponding function can be implemented on the XILINX development board, and the simulation can also
TutorialSpartan3EBasys
- it is the file which is named as starting KIT for Spartan 3E