资源列表
uart
- 基于verilog的fpga串口通信,rx,tx.两根线(Basend on verilog fpga uart tong xin)
FPGA实现SPI的程序实例
- 基于verilog的FPGA spi通信协议，sck.(FPGA spi communication protocol based on verilog, SCK.)
SPI主机
- 基于verilogde的fpgaspi通信主机(Based on verilogthe communication host)
test_uart
- 基于fpga的uart串口通信协议，64位数据(Uart communication protocol based on fpga, 64-bit data)
design guideline for verilog basic circuit
- basic circuit design based on verilog
ccd
- 简易数字频率计，实现建议的数字频率计功能，测频，测周期，测相位，并在LCD上显示出来。(Simple digital frequency meter, to achieve the proposed digital cymometer function, frequency measurement, cycle measurement, phase measurement, and displayed on the LCD.)
synth_fft
- FFT的VHDL全套代码，可以测试通过了，没问题 只管下载(FFT VHDL full set of code, you can pass the test, no problem, just download)
Verilog-数字频率计
- verilog数字频率计设计,内容挺详细(Verilog Frequence Measure)
ram_2
- 双端口RAM，可读，可写，用Verilog编写。希望与大神交流，求大神指正。(Dual port RAM, readable and writable, written in Verilog. Hope to communicate with great God, ask God to correct me)
结题报告-基于链家网数据的上海二手房房价分析
- 用FPGA 编写的双端口的RAM，可以实现读写，希望通过这个平台与各个大神交流，希望得到大神的批评指正。(Prepared by FPGA double port RAM, you can read and write, and I hope that through this platform to communicate with the great gods, hoping to get criticism of the great god.)
jiaotongdeng
- 基于VHDL状态机的交通灯设计（已仿真下载实验板测试）(Traffic light design based on VHDL state machine (simulation download, experimental board test))
20170808_fifo_xc5v_v1.5
- FPGA通过fifo进行数据的载入载出，实现数据的暂时存储和传递(FPGA through fifo data loading and unloading, to achieve temporary storage and delivery of data)