资源列表
QD_Tft43
- cpld+sram驱动tft 驱动4.3寸480x272分辨率的tft显示屏-Cpld+sram drive TFT drive 4.3 inch 480x272 resolution TFT display
10.2LCD_display-04
- 应用于车载系统娱乐设施，控制图像RGB数据在LCD屏上点屏，包括LCD的点屏时序控制，以及相关的LCD屏配置信息-Used in vehicle system entertainment facilities, control the RGB image data on the LCD screen, including point of LCD screen sequential control, and related LCD configuration information
iic-BUS
- I2C/IIC 总线接口驱动，在Altera的FPGA上跑过，VHDL编写-I2C/IIC bus interface driver, running over the FPGA
cachecontroller_latest.tar
- This project is to develop a direct mapped cache controller for embedded applications. Key Design Features - Direct mapped with configurable address size, line size and number of cache lines - Non Pipelined architecture - No Cache f
pci_to_wb_latest.tar
- PCI slave to WB master
fre(1000hz)
- 基于FPGA的频率发生器，晶振频率为48MHZ，输出频率为1000Hz，经过示波器检测，实际测得频率999.988HZ，误差在0.0012 -FPGA-based frequency generator, the crystal frequency is 48MHZ, the output frequency of 1000Hz, through the oscilloscope, the actual measured frequency 999.988HZ, error 0.0012
DIV
- 最新修改 veilog 除法器，32位除16位，输出数据锁存-//divider dividend divisor* quotient+ remainder //dividend 32 bit //divisor 16 bit //quotient 32 bit //remainder 32 bit //need 32 clk to finish the calculation //start 1 start the calculation //s
TR0114-VHDL-Language-Reference
- This comprehensive reference provides a detailed overview of the VHDL language and describes each of the standard VHDL keywords (reserved words)
1553_module
- MIL-1553B RT controller output shown in BC(RT-BC) VHDL code
adc_ltc238016
- LTC238016fa VHDL execution code
adapt_filt_
- adaptive filter with two reference signal for filtering noise
keyscanverilog
- 按键消抖程序，通过FPGA实现.验证通过-Key debounce program by FPGA. Verification by