资源列表
shuzipaobiao_all
- VErilog源码，数字跑表数码管显示，按键控制-VErilog source, digital stopwatch digital display, control buttons
yiweijicunqi
- 移位寄存器的原理图设计，基于quartusII软件。-Shift register schematic design, based quartusII software.
DE2-115_labs_vhdl
- DE2-115板上的，lab-exercise的PDF历程-, Lab-exercise of PDF course DE2-115 board
DE2_115_pin_assignments
- de2-115引脚的配置，quartusII的设置-de2-115 configuration pins, quartusII settings
liushuideng
- 流水灯，控制方向，对系统时钟进行分频，奇偶数闪亮-Water lights, control direction, the system clock frequency, odd even flashing
pinlvji-design-VHDL
- 使用Altera公司的EP2C35系列的FPGA芯片，利用SOPC-NIOSII-EP2C35开发板设计和仿真一个数字频率计，对1Hz~250KHz 的脉冲进行频率测量，采用等精度测量，即在所测量的整个频段内部，均可实现相同精度的测量，测量精度与频率无关，结果在数码管上显示-The use of Altera EP2C35 series FPGA chip using the SOPC-NIOSII-EP2C35 board design and simulation of a digital
breath_led
- verilog breath led sourece code
buzzer_sos
- 蜂鸣器源代码buzzer code verilog-buzzer code verilog
display_sm
- 数码管扫描verilog源代码 display code verilog-display code
uart
- 串口verilog源代码 uart code verilog-uart code verilog
uart_back
- 串口回传verilog源代码 uart back code verilog-uart back code verilog
7seg
- 7seg.rar this file is use to fpga(altera) HEX-7seg verilog/VHDL-