资源列表
tanchishe
- VHDL实现的贪吃蛇，碰到自己身体或规定范围壁障游戏结束，每吃3个点身体长度加1-VHDL Snake
DS18B20
- DS18B20的FPGA驱动程序，DS18B20的FPGA驱动程序。-the driver of DS18B20.
add
- 硬件描叙语言实现一个加法器，开发环境使用的是libreo，用的是Verilog语言-Hardware descr iption language to realize an adder, development environment using the libreo, with Verilog language
yinpin_display0925
- 实现音频的I2S通信，音频柱的显示，及其噪声的处理等功能-Realization of audio I2S communications, audio column display, and its noise processing, and other functions
median5x1
- 一个自己写的5x1中值滤波算法，可以直接使用.-It is 5x1 median filter arithmetic.
uart
- 串口功能的硬件调试，串口功能，VHDL语言-A serial port function hardware debugging, serial port function, VHDL language
XianShiRiQi(weizhun)
- 数码管显示日期，用verilog语言书写，8个数码管可循环左移-Digital tube display the date, written in verilog language, eight digital tube can be cyclic shift to the left
TOP
- IFFT快速傅里叶逆变换的FPGA实现,IFFT的实现-IFFT fast Fourier inverse transformation of the FPGA implementation
clip_viseo
- 视频旋转 连续写，离散读，为了提高效率，分块突发读写。-video rotate
Quartus13.0-create-NIOS2-
- Quartus13.0创建NIOS2实验步骤说明-Quartus13.0 create NIOS2 introduction
Verilog-HDL-introduction
- 简单实用的Verilog HDL 入门教程-Verilog HDL introduction
cic_core
- CIC CORE is very good core for your projects.