资源列表
lcd
- 黑金FPGA开发板液晶驱动程序，包含了液晶控制模块，RAM模块，和SPI写模块。-Black gold development board FPGA LCD driver, including LCD control module, RAM module, SPI module and write.
divide-freq
- 基于XILINX芯片的verilog程序。调用DCM模块，完成50MHz转换75MHz，相位偏移90°-XILINX chip based on Verilog program. Call the DCM module to complete the 50MHz conversion, 75MHz, phase shift of 90 degrees
multiplier
- 使用硬核乘加器完成两路输入数据相乘，每8个乘积结果累加后输出-The use of hard core multiplier accumularor complete two-way input data is multiplied by each of the 8 product, the cumulative output results
ADDA_4CE15
- 黑金开发板基于ALTERA cyclone4的AD/DA高速采集程序-Black gold development board based on AD/DA high speed acquisition program ALTERA cyclone4
key.v
- Verilog HDL 4*4键盘扫描模块-Verilog HDL 4*4 keyboard moodule
Brent_kung_adder
- Brent_kung_adder to add 8 bit input
booth
- Booth multiplier to multiply 12 bit number
final-ashwin
- image difference in verilog
CPU
- 五级流水线.期末的project,写了很详细的注释，应该能看得懂了吧。-Five-stage pipeline. Closing the project, wrote a very detailed notes, should be able to understand it.
2.adder
- 基于VHDL的全加器时间延迟分析，分析基本器件的传输延迟和惯性延迟-the analysis of timing delay of full adder in VHDL
fifo_uart_vhdl
- 带FIFO的串口收发模块 功能完善32位的fifo-the uart with fifo
key_alone
- 4x4矩阵键盘扫描 去抖动 带编码输出 模块打包-the program of key scan