资源列表
vga_display
- VHDL语言VGA显示代码，可以正常运行-VHDL language VGA display code
scr
- 4阶24倍抽取CIC滤波器设计-4th order 24 times CIC decimation filter design
scr
- 高级篇03：基于matlab和fpga的FIR滤波器设计-Senior chapter 03: matlab and fpga based FIR filter design
src
- 同步异步复位、上升沿触发D触发器-Synchronous asynchronous reset, rising edge triggered D flip-flop
scr
- 三段有限状态机编写-Three sections of a finite state machine to write
JTD
- 基于VHDL编程软件的交通灯设计，红灯、黄灯、绿灯分别以不同时间闪烁。-VHDL programming software design based on traffic lights, red light, yellow light, green light flashes at different times respectively.
decoder
- 采用VHDL语言输入法，根据HDB3码编解码规则，确定HDB3码编画出HDB3码的程序设计流程图。编写VHDL源程序、调试及仿真时序波形 -Using VHDL language input method, according to the HDB3 encoding and decoding rules that determine HDB3 code HDB3 encoding and draw a flow chart programming. Write VHDL source co
LCD1602
- 1602的基础显示程序，FPGA，Verilog编写，可以自行拓展，简洁可靠！-1602 foundation display program, FPGA, Verilog prepared, self-expanding, simple and reliable!
hdlc_latest.tar
- 数字系统中的HDLC的IP核，可以作为入门使用-Digital system in the HDLC IP kernel, can be used as entry
pci_mini_latest.tar
- 数字系统中的PCI最小系统的IP核，可以作为入门使用- The minimum system of PCI digital system in the IP kernel, can be used as entry
CRC
- CRC算法和c语言实现,介绍很详细，不错，可以参考-CRC algorithm and c language, very detail
Verilog_HDL_elevator
- Verilog实现的基于FPGA的五层楼电梯运行控制逻辑设计-FPGA-based five-story elevator control logic implemented in Verilog design