资源列表
minimum-FPGA-system
- 本书主要讲述了FPGA系统的基本设计方法和注意事项，其中列举了很多实力供大家参考-This book describes the basic design FPGA systems and precautions, which lists a lot of strength for your reference
hdl-hw1-brent-kung-adder
- BRENT KUNG ADDER 4 bits
adc_control
- 控制ADC08D1000，用于2G采样数据-Control ADC08D1000, sampling data used for 2G
pwm_key
- 用fpga ep2c8Q208实现的按键可控PWM信号发生器 （按键加了消抖模块，PWM寄存器位宽为32位）-Achieved with the fpga ep2c8Q208 PWM control signal generator key (key plus the debounce module, PWM register bit width is 32 bits)
ep2c5t144
- EP2C5T144原理图，最小系统开发板。-EP2C5T144 schematic diagram, the minimum system development board.
ISE_lab17
- 本实验使用 XILINX 提供的IP 核，并例化该IP 核来实现正弦信号发生器的功能。由于 ISE 中有DDS（Direct Digital Synthesizer 5.0）IP 核，因此只需要编写一个顶层文件来调用 Core Generator 生成的IP 即可。-This study provides the IP core using the XILINX, and cases of the IP core to achieve the sinusoidal signal gene
fifo
- FIFO 是一种先进先出数据缓存器，这是一个同步FIFO的VHDL源程序，将FIFO分成几个模块进行设计，最后用顶层文件进行模块化设计。-FIFO is a FIFO buffer, which is a synchronous FIFO in VHDL source code, will be divided into several modules FIFO design, top-level files Finally, the modular design.
vhdldaima
- 各种vhdl的源代码，基本vhdl的源代码，让你更好学会vhdl-failed to translate
RS232
- 用硬件描述语言VHDL进行串行通信接口电路设计，能通过RS232协议与PC机进行通信。-VHDL hardware descr iption language used for serial communication interface circuit design, through the RS232 protocol to communicate with the PC unit.
AN151
- AMBA Application Note: AN151 - Using EB with example AXI Logic Tile. -AMBA Application Note: AN151- Using EB with example AXI Logic Tile. This example shows how to use the EB baseboard with an example AXI Logic Tile. The following board c
test
- Spartan-3e LED测试代码, 用SW0进行开关控制-Spartan-3e LED test code, the switch SW0
saicheyouxi
- 用VHDL软件开发了赛车游戏，经过max plus 2的验证 很好而且很实用 很有意思-VHDL software was developed with racing games, after a good verification max plus 2 very interesting and very useful