资源列表
LED
- LED跑马灯 代码为Verilog。已经在V5 ML506上验证过。 -LED Marquee code for Verilog. On the V5 ML506 has been verified.
debussy
- Debussy 是NOVAS Software, Inc(思源科技)发展的HDL Debug & Analysis tool，这套软体主要不是用来跑模拟或看波形，它最强大的功能是：能够在HDL source code、schematic diagram、waveform、state bubble diagram之间，即时做trace，协助工程师debug。 本文主要是介绍Debussy的使用，以及如何在Modelsim环境下生成Debussy所需要的fsdb文件-user guide f
init9956
- 基于AD9956的频率合成器的FPGA程序编程-AD9956 a FPGA Program
Crack_Altera_6[1][1].0-9.1
- quartus版本的破解 从6.1至9.0间所有版本-quartus crack version from 6.1 to 9.0 all versions
USB2.0-IP-core
- 用verilog 写的USB2.0，含源码。从别处找来的，不敢独享，希望对大家有帮助-Written by verilog USB2.0, including source code. Recruited from elsewhere, and not exclusive, we want to help
ADV7179芯片的驱动程序
- ADV7179芯片的驱动程序，基于FPGA硬件实现，已经验证可以使用-ADV7179 chip drivers, FPGA-based hardware implementation has been verified using
DDRSDRAM_controller
- ddr sdram控制器，lattice器件的参考设计，比较详细-ddr sdram controller, lattice components of the reference design, very detailed
FPGA实现多功能闹钟
- FPGA实现多功能闹钟，有电子钟、秒表、定时器、电子琴功能-FPGA realization of multi-function alarm clock, which can function as a clock, a stopwatch, a timer,and a piano.
double_mux4_1
- 设计一个双四选一的数据选择器电路 设计要求： （1）双四选一的数据选择器的电路框图如图3.2.3所示，试写出设计块对其逻辑功能进行描述。 -Choose a design of a dual quad data selector circuit design requirements: (1) a double four selected data selector circuit diagram shown in Figure 3.2.3, try to write the
Modelsim10.0.crack.by.EFA
- Modelsim10.0.crack.by.EFA,请买不起正版的学习者使用,请勿用于商业用途-Modelsim10.0.crack.by.EFA, you can not afford genuine learners, do not for commercial use
pingpong
- 利用DE2开发板在VGA上实现乒乓球游戏，并做了背景的改进，增强趣味性。已经调试过，可用。-DE2 development board using the VGA to achieve table tennis game, and gave the background to improve and enhance fun. Has been debugged and available.
sd_card
- 面向altera公司的大学计划sd-card ip核，检测sd卡是否插入卡槽中。-Altera company s University Program for sd-card ip core, testing sd card is inserted into the card slot