资源列表
VGA_control_verilogHDL
- 基于FPGA的VGA控制器设计。对外支持普通VGA接口，以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。
vga.niosII.compent.v
- 在cyloneIIFPGA平台下设计完成测试通过的VGA控制器代码。显存留在系统的SDRAM中，用FIFO作为缓冲。-in cyloneIIFPGA platform design is completed tests through the VGA controller code. RAM in the system SDRAM, and use as a FIFO buffer.
DDS_generator
- DDS锯齿波发生器： 开发平台：maxplus＋FPGA 功能： 输出X路扫屏锯齿波。频率可用键盘精确控制，设置多个挡位；可水平移动波形；-DDS sawtooth generator : Development Platform : maxplus + FPGA functions : So output X Lu Ping Sawtooth. Keyboard can be used precision frequency control, multiple gear; Mobile
254646
- 数码管动态扫描 vhdl-of dynamic digital scanning vhdl
exp13_7
- 竞赛抢答器:控制8255,C口作为输入,从A口输出与之对应的LED段码-race Responder : Control 8255, C mouth as input, output from the A-corresponding to the code of LED
32mem-rw
- c++编写的32位存储器读写程序,完成向6116填入数据并显示的功能-c prepared by the 32 memory reading and writing procedures to be completed 6116 and complete the data showed that the function
exp25_17
- 用c++程序,基于8255和8253实现的一个电子琴程序-with c procedures, based on 8255 and 8253 achieved a flower procedures
exp28_20
- C++程序控制8255(C口输入, A口输出)的直流电机-8255 C program control (C mouth input, output A. I) Motor
exp03_PCI
- PCI设备查询及其配置空间的读取,Win9X/me下可以用,显示数据含义可查看PCI22规范中的介绍-inquiries and equipment PCI configuration space read, Win9X/me can use. display data access PCI22 meaning of the norms introduced
1231314141
- 是用VHDL编写的电子时钟，用两个键控制，在选中调节时，该位还闪烁。-VHDL is prepared by the electronic clock with two key control, the selected adjustment, the place still blinking.
vhdladc0809
- adcint,是adc0809的采样控制器设计!-adcint is adc0809 sampling controller design!
2FSK2psk
- ２ＦＳＫ２ＰＳＫ－二进制频移键控和相移键控信号发生器的源程序，是基于ＱＵＡＲＴＵＳ ＩＩ软件平台，使用ＶＨＤＬ语言-2FSK2PSK-binary frequency shift keying and phase shift keying signal generator source, QUARTUS II is based on the software platform, the use of VHDL