资源列表
A-Fast-CRC-Implementation-on-FPGA
- CRC错误检测是一个非常 电信应用上常见的功能。 对提高数据速率的发展要求 更多和更sofisticated实现。 在本文中，我们提出了一个方法来实现 管道结构为基础的CRC功能 多项式除法。它非常有效地改善 高速性能，允许从1 Gb / s的数据传输速率 4千兆位/秒，基于FPGA implementions根据 并行化水平（8至32位）。- The CRC error detection is a very common functio
PCM-Coding
- VHDL语言实现了PCM采编器，应用计数器、数据选择器实现了PCM编码与传输控制，系统时钟由分频器实现。-VHDL language PCM editing application counter, the data selector PCM encoding and transmission control of the system clock by a divider.
VHDL-CODE
- 书籍源代码_基于Altera FPGA/CPLD的电子系统设计及工程实践 -Books source code _ of Altera FPGA/CPLD-based electronic system design and engineering practice
uart_rx_tx
- 基于sp605开发板的一个串口收发程序。包含了所有ise产生的完整的文件（ucf等），通过串口调试助手测试通过。共有四个模块构成。-Program based on the the sp605 development board serial transceiver. Contains all ise complete file (ucf etc.), by serial debugging aides tests. A total of four modules.
CPU
- 东南大学COA下实验设计CPU完整程序，可以在RAM中写程序并可观察各个输出的波形，用于检验。-south-east university COA II the design cpu lesson which you can write your own program in the cpu and also can chack the wave
VGA
- VGA controller, it has all the needed inputs and output which help to display on vga screen.
multiplexor
- multiplexor 3x1 bites is done by me on cla-multiplexor 3x1 bites is done by me on class
eepromFINALcorto
- Basically it waits for a interrupt (push button) and checks if an eeprom 24c64 has FF in all its address then turns a led if true, this is only if the switch in port D is closed, if not, it writes a byte number "i" in the adress number "i" and then v
111
- 烟感探测器设计应用笔记,真好，真的很完整的设计应用笔记-Smoke detector design application notes, nice, really complete design application notes
sincos
- 主要是sincos函数的实现，编译软件为Quters II，语言为VerilogHDL语言。-Sincos is the realization of the main function
mizishumaguanshow
- 用CPLD实现米字型数码管的显示，主要显示字符。-Use CPLD realize m digital display font tube, the main display character.
siweiyitishumaguanshow
- 用CPLD实现四位一体数码管的显示，主要是电筛子的功能-Use CPLD realize four one digital tube display, mainly is the function of electricity a sieve