资源列表
cx
- 变模可逆计数器的VHDL功能描述，是数字锁相环的一个期间的程序-Reversible counter variable mode
keyboard
- verilog FPGA开发板4*4键盘代码，正确可实现-4*4keyboard diven by verilog
VGA
- VGA接口程序，包括简单图像和数字的显示，适合初学者，使用verilog语言-FPGA-driven interface VGA simple shapes and numbers
verilog-calculator
- 基于verilog的计算器，实现简单的加减乘的运算，并有退格键和清零键-verilog calculator
Automatic-telephone-card
- 自动售卡机，有四个按键，分别代表100,50,20和10，能够找零和显示钱-Automatic telephone card
DC
- 基于VHDL的数字时钟，包含设置时间，闹钟，以及整点报时的功能。设置时间和闹钟时数码管闪烁。-Based on VHDL digital clocks, including setting time, alarm clock, and the function of the time on the hour. Set a time when the alarm clock and digital tube twinkle.
counterms
- verilog语言写的可置数的倒计时计数器，共四位bcd码，分别为分钟两位和秒两位。波形完美无毛刺.开发环境没找到verilog只好写了vhdl-verilog based counter for minutes and seconds
loop
- loop filter IIR for pll Fm demodulator
chuzhi
- 基于CPLD的函数发生器初值程序，此程序能够实现函数发生器的初始化设置。-The initial value function generator based on CPLD programs, this program will be able to realize the function generator initialization Settings.
fangbo
- 本程序是基于CPLD的方波程序 ，本程序能实现的功能为：产生一定幅值的方波 并且频率可调-The program is based on the CPLD square wave program, the program can realize the function for: produce certain of square wave amplitude and frequency adjustable
fenpin
- 本程序为分频程序，在函数发生器的设计中它能够实现频率的控制，从而可以使得函数发生器能够输出不同频率的波形-The procedures for the points frequency program, in the design of the function generator in it can realize the frequency control, which can make function generator can output the frequency of diffe
kongzhi
- 本程序为控制程序，在函数发生器的设计中它能够实现控制任一波形的输出，根据按键的选择来实现控制-The procedures for the control program, in the design of the function generator in it will be able to realize the control of any wave output, according to the choice of buttons to realize control