资源列表
lcd12864
- 基于FPGA的128*64的液晶显示控制，对刚学习用FPGA控制液晶显示的同学有一定的帮助-On FPGA 128* 64 LCD display and control
DA
- 基于FPGA的对DAC0832的控制的一个简单的程序，帮助初学者理解-Based on FPGA for control of the DAC0832 a simple procedure, to help beginners understanding
AD
- 基于FPGA的对ADC0809控制的一些实例，对初学者有一定的帮助-Based on FPGA for control of the ADC0809 a simple procedure, to help beginners understanding
ra3_lib
- serial FIR filter with 2048 tap. Clock runs 4048 times faster than sampling frequency to finish FIR filter calculations before the next sample. Filter coefficients can be loaded in ROM as .hex file. Suitable for room reverberation and high order filt
HIT_test
- 哈工大的组成原理课程设计，主要是verilog实现20几个常用指令-HIT the composition principles of curriculum design, verilog achieve 20 several commonly used instructions
PS_2
- 时钟为50MHz的 可以用的,在fpga开发板上测试过的，可以直接拿来当做模块用-Clock to 50MHz . can be used
6
- 该程序包含了完整的实体结构，实现的是一个K位xK位的布斯乘法器-The program includes a complete physical structure, to achieve a K xK-bit Booth multiplier
5
- 七段字符显示器逻辑功能的VHDL语言程序，本程序采用IF语句形式-VHDL language program of the seven-segment character display logic functions
4
- 8x9FIFO逻辑功能的VHDL语言程序，程序中定义了四个进程，用来寄存数据，控制读指针，控制写指针以及控制三态输出-VHDL language program for 8x9FIFO logic function, the program defines four processes for data storage to control the read pointer to control the write pointer as well as to control three-stat
verilog18b20
- DS18B20操作，verilog HDL-DS18B20control，verilog HDL
AD603
- AD603的程序，AD603的基于FPGA的编程文件，并希望后者学者希望份额AD603verilog语言 -AD603 program, the file on the AD603 FPGA-based programming, and hope that the latter scholars want AD603verilog languages share
8bitDDS
- 在QUARTUS II 8.0下做的基于DDS的多功能调制器，可实现ASK、FSK、BPSK调制。用SIGNALTAP仿真测试正确。-A In multi-function modulator based on DDS in QUARTUS II 8.0 , can realize the ASK, FSK, BPSK modulation. With SIGNALTAP simulation test right.