资源列表
OFDM-learning-based-on-xilinxFPGA
- 用FPGA设计了CDMA中OFDM的通信过程，还包括了扩频-FPGA implentatiom for CDMA-OFDM
BCDdecode
- 七段 BCD 译码的实现，可以实现基础电路的译码功能，比较简单！-BCD decoder
and_2
- 二与门的设计与实现，希望给初学者一个自己练手入门时写的一个例程，与大家分享-and gate!
key_jitter
- 键盘去抖程序，额外的加一个延时判决来判定时钟到来时是信号的到来还是干扰的因素，达到了比较好的效果，与大家分享-a design for key jitter
wled
- 流水灯的设计与实现，通过控制各个 位的值来控制七个灯的交替闪亮，效果比较好，给初学者分享！-water light design ！
shu_255
- CPLD驱动数码管The CPLD driven digital tube-The CPLD driven digital tube
abc
- 时钟频率计,能够实现分频的功能，在CPLD上可以看到所想要的现象-clock frequency ，you can learn about how to frequency and hnow tackle simlar problem,what s more ,you can learn some useful information,i belive you do it!after you have read it ,don t spread!thank you!!!
versatile_fifo_latest.tar
- Verilog HDL语言编写的通用FIFO，让你更加了解FIFO的原理-versatile fifo based on verilog hdl.
ch06-3_Verilog-HDL
- Verilog HDL基础Verilog HDL设计模块的基本结构 Verilog HDL的语言规则用Verilog HDL实现各种类型电路及系统设计的方法-The basis of Verilog HDL Verilog HDL design module, the basic structure of the Verilog HDL language rules to various types of circuit and system design using Verilog HDL
DE2_Top
- DE2 驱动配置,LCD,LED,,Audio,VGA显示等功能-DE2 driver config to realise LCD/LED/VGA/Audio display
traffic-light
- 用vhdl编写的交通灯程序，开发平台为quartusII。调试好的工程文件，可直接下载到实验箱-Written with vhdl traffic light program, the development platform for quartusII. Good debugging project files can be downloaded directly to the experimental box
s101
- 用VHDL语言，设计一个“101”序列检测器，双过程描述编写-VHDL language, to design a dual procedure describes the preparation of "101" sequence detector.