资源列表
two_d_idct_final
- 反离散余弦变换，可以正确实现功能，通过了功能仿真-Inverse discrete cosine transform
mydds1
- Write your own DDS generators, square wave, triangle wave, sine wave, you can also enter any Waveform files
VHDL_tip
- VHDL of many examples, including the LED, lcd, keypad, digital control and so on, very practical. -VHDL of many examples, including the LED, lcd, keypad, digital control and so on, very practical.
uart-vhdl
- 不错的uart总线程序，已经测试过，没有问题啊-Good uart bus program, has been tested, there is no problem ah
VHDL
- vhdl入门级别的一些介绍，我觉得挺详细的，适合入门啊-vhdl entry-level introduction, I feel quite detailed, for entry-ah. .
pinglvji
- 频率计设计，实验过，好使，希望能帮到大家-Frequency meter design, experimental, so that, I hope to help everyone
VGA
- 基于FPGA驱动VGA的VHDL语言，主要是详细的代码-Drive VGA FPGA-based VHDL language, the detailed code
clock-with-alarm-and-timer
- 黑金EP2C5QC808N系列，Quartus 11.0 中编译综合的数字钟，具有实时时钟运行，时钟校准，整点报时以及定时提醒功能，包含全部的工程文件。-Black EP2C5QC808N series, Quartus 11 compilation and synthesis of digital clock, with real-time clock operation, calibration of the clock, the whole point timekeeping, timin
FPGA__uart(quartus11.0)
- 实现串口调试,也可以实现多个串口，自己建立nios核，多哥串口，带上拉电阻，以用CH340实现RS232通信-VERION verliog,qurttus 11.0 nios:nios_IDE11.0 ，
uart3
- 实现多个串口通信，这里是两个各，两个会了，多个也一样，版本qurtus11.0，nios：nios_11.0-you can have ues this rs232 conmunition, qurtus11.0，nios：nios_11.0
fpga_PWM
- 这是一个Verilogde pwms应用程序，经过仿真。-This is a pwm interface programme-This is a pwm interface programme ! this is very useful !
zhong
- 基于CPLD的多功能数字钟编程，具有闹钟，整点报时，倒计时，日历等功能-CPLD-based multi-functional digital clock programming, alarm, hourly chime, countdown, calendar and other functions