资源列表
PL_FSK2
- 基于altera公司的quartus软件做的2FSK解调-The doing altera quartus software 2FSK demodulation
DeathRoad
- traffic light controller.-traffic light controller.
abc
- 总线控制，用于嵌入式系统也fpga通信，主要用用于的产品是光时域反射仪-The bus control for embedded systems fpga communication products, mainly used for optical time domain reflectometer
xors_1
- this xor gate in vhdl run under active hdl-this is xor gate in vhdl run under active hdl
mux2
- this is multiplexer gate in vhdl run under active hdl
adder
- tis an adder code in vhdl-tis is an adder code in vhdl
tswc_state
- 用状态机控制8位移位寄存器，能够实现二极管左移,右移，明暗闪烁交替。-8-bit shift register, state machine control can diode left, right, light and dark flashing alternately.
verilog_example
- verilog的小程序集合，适合与初学者学习参考-The verilog small collection of programs suitable for beginners to learn reference
clock_for_6.0
- 基于FPGA的电子钟，开发环境是Quartus II 6.0。功能是3个按键分别设置时分秒。通常作为课程设计，供同学参考~-Electronic bell, development environment based on FPGA Quartus II 6.0. The function is the three buttons to set the hour, minute and second. Usually as courses designed for students to ref
edayima
- 3－8译码器的VHDL描述，及quartus ii对其进行的波形仿真文件-3-8 decoder in VHDL, and its quartus ii waveform simulation files
shiyan8
- 出租车计费系统verilog hdl编写-verilog hdl taxi
VHDL-2FSK
- 基于VHDL的FSK调制与解调， 基于VHDL的FSK调制与解调，-VHDL-based FSK modulation and demodulation