资源列表
Project10
- Hamming codes can detect up to two-bit errors or correct one-bit errors without detection of uncorrected errors. By contrast, the simple parity code cannot correct errors, and can detect only an odd number of bits in error. Hamming codes are perfect
LCD
- 液晶控制器，verilog程序，仅供参考，上网找了好久没找到。-LCD controller, verilog program.
Altera_verilog_lcd12864
- FPGA采用Altera_verilog实现lcd12864中文显示-FPGA using Altera_verilog achieve lcd12864 Chinese display
Altera_Verilog_lcd1602
- FPGA采用Altera_Verilog实现lcd1602显示-FPGA using Altera_Verilog achieve lcd1602 Show
add
- 北京邮电大学VHDL课程作业，基于xilince ISE试验箱开发的，可以做简单的半加器加法-Beijing University of Posts and VHDL course work, based xilince ISE chamber developed, can do simple addition of half-adder
rili
- 北邮的大作业，基于ISE试验箱编程的万年历，LCD数码管显示，可以开关控制，测试成功-Great job BUPT, based on the ISE chamber programming calendar, LCD digital display, you can switch control, the test is successful
time
- FPGA做的电子钟，通过定时器实现。用vhdl做的led ip核，软件实现控制显示-FPGA do electronic bell, by timer implementation. Led ip vhdl do with nuclear, software control display
led
- FPGA做的led流水灯，quartus搭的nios，计时器每隔一秒led点亮一次，四个流水灯循环显示，适合新手学习-FPGA do led light water, quartus ride nios, timer once every second led lights, four light water cycle, for beginners to learn
eda1
- 电子系统设计中的一段代码，主要实现分频功能，很有用-Electronic system design section of the code, the main function of frequency, useful
CA-code
- 生成CA码verilog代码，quartusII开放环境，含源代码和仿真文件（波形、testbench）-CA generated code verilog code, quartusII open environment, including source code and simulation files (Waveform, testbench)
control
- 微程序控制器的VerilogHDL代码，24位微指令，一般用于CISC控制器的设计-Micro-program controller designed VerilogHDL code, 24 microinstruction, generally used for CISC controllers
LC3_CPU-varellow
- LC3 CPU的仿真，使用Verilog语言编写-Simulation LC3 CPU using Verilog language