资源列表
modulsim_use_ise_derectly
- 一个简单的使用modlsim直接调用ise的实例，自己当时写的，通过编写do文件直接用modlsim来调用ise的核文件仿真。仅供学习参考-use modulsim call the ise file derectly by writing do file in the modulsim
multiprocessor_tutorial_final_v1
- 多核处理器系统整个源代码，可以在DE2开发板上运行，请大侠多多指点，-Multi-core processor systems throughout the source code can be run in the DE2 board, heroes lot of guidance, thank you
LCD
- 基于vhdl简单的液晶显示电路设计(VHDL desingn)-Display circuit design (VHDL desingn) based on a simple LCD vhdl
counter
- module counter for VHDL on FPGA Kit
tp-vhdl
- A LOT OF LABS ON VHDL MADE AT SCHOOL BY my self A LOT OF LABS ON VHDL MADE AT SCHOOL BY my self
decoder
- bch decoder 3072 3240 vhdl source code with ise software
bch_codeword11
- 3072 to 3240 vhdl encoder source code
verilog-radix4
- Master Thesis(FFT_RADIX-4)-This thesis deals with a 64-point Radix-4 in-place FFT, based on an improved FFT algorithm. The whole FFT structure was implemented based on self-designed modules and by manipulating the embedded Virtex II FPGA’s module
RADIX4-_VHD_FILES
- ALL .VHD FILES USED IN IMPLEMENTING THE RADIX-4 FAST FOURIER TRANSFORM ON XILINX DESIGN TOOL
trial_i2c
- i2c code for vhdl implementation,i2c main code with u-art_tx.vhd file and i2c_master.vhd
Dm9000a_Verilog
- 本文为实现高速数据的实时远程传输处理,提出了采用FPGA直接控制DM9000A进行以太网数据收发的设计思路，实现了一种低成本、低功耗和高速率的网络传输功能，最高传输速率可达100Mbps。-DM9000 driver
ccd_drive
- FPGA驱动TCD2252D源码，包含六路驱动时序，经验证无误-FPGA drives TCD2252D source, including six road driving timing, proven correct