资源列表
uart_io_test
- verilog中UART的PC通信协议,看过的人都说好，已经验证正确性，很不错的代码。-verilog in the PC UART communication protocols, seen people say well, has verified the accuracy, very good code.
SI4432_TX_192
- 基于FPGA的SI4432无线透传模块的VERILOG工程，测试可用-FPGA-based wireless passthrough module SI4432 VERILOG engineering, testing available
SI4432_RX_192
- 基于FPGA的SI4432无线透传模块的VERILOG工程，测试可用(接收端工程文件)，使用Quartus II 可以直接打开。 -FPGA-based wireless passthrough module SI4432 VERILOG engineering, testing available
led
- 流水灯，通过时钟控制，每个时间显示不同颜色，共有32中颜色-Water lamp, the clock control, each time display different colors, a total of 32 colors
FPGAUART
- FPGA的串口通信程序，平台为XILINX的SPANTAN-6，压缩包中有具体的说明文档。-The serial communication of FPGA program and Platform for XILINX SPANTAN-6, compressed package with specific documentation.
SynchronizeAutomaticallyEntersCPLD
- CPLD与CY7C68013通讯程序，使用的是同步输入功能，测试过了可以使用，需要下载自动同步驶入的固件。-CPLD and CY7C68013 communication program that uses synchronous input function test can be used, you need to download the firmware automatically synchronized into.
FPGAPRJ
- NIOS 基于 cyclone 2 的工程 -NIOS based engineering cyclone 2
TX
- 串口发送控制程序！在一帧的发送下，经过串口协议编写的硬件描述语言verilog！-Serial transmission control program!
RX
- 串口接收程序源码，经过实际验证的最终版本，接收的操作！-Serial port to receive program source code, the actual verification of the final version after receiving operation!
SOS
- 基于verilog的sos求救信号的编写，适用于quartus ii的开发环境！-Verilog based distress signal written in sos, apply quartus ii development environment!
SignalTap_Test
- 基于quartus ii的SignalTap的测试文件编写，富有测试后的时序文件！-Based on the SignalTap quartus ii test documentation, full test series after the file!
PWM
- 在verilog开发环境下针对pwm信号的占空比的调节的编写调试！-In the development environment for verilog pwm signal duty cycle regulated write debugging!