资源列表
endat_c
- 用于读取海德汉绝对位置编码器的位置数据。ENDAT2.1接口-Read the data from ENDAT2.1
DAC0832
- 关于FPGA控制dac0832的VHDL源码-With regard to the VHDL source FPGA control dac0832
ssram
- 同步静态RAM读写程序，可用作模块，已通过ISE12.4验证-Synchronous Static RAM read and write procedures, can be used as modules, have been verified by ISE12.4
NandFlash-FPGA-controller(ECC)
- 该压缩包包括NAND FLASH（美光）的FPGA控制器的原理及VHDL源码，非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
EnDatlightversion
- 海德汉绝对值编码器的ENDAT2.2协议代码，用于编码器数据的解码，然后把得到的数据传送给DSP处理，我们公司用于高精度伺服驱动器上。-Heidenhain encoder absolute agreement ENDAT2.2 code encoder data for decoding the data and then transmitted to the DSP processing, our company for high-precision servo drive.
caiheng
- 利用Verilog实现32位浮点数的乘法,并且已通过验证.-Using Verilog to achieve 32-bit floating point multiplication, and has been verified.
FPGA_DE2_MUSIC
- 基于FPGA的乐曲硬件演奏模块设计，利用硬件描述语言设计符合技术指标的乐曲硬件发生模块，建立实验模型，通过电路仿真和下载硬件测试，在DE2 EDA实验平台上验证其功能-FPGA-based music performance modular design of hardware, using hardware descr iption language designed to meet specifications of the piece of hardware modules occurs,
dpll
- dpll的verilog代码，完成数字锁相。用于时钟对准，位同步。-dpll the verilog code to complete the digital phase-locked. Alignment for the clock, bit synchronization.
add4
- 一个用vhdl代码设计的简单的加法器程序-it is a code designed by vhdl ,and it is used for adder
SDRAM
- verilog语言对SDRAM读写时序的描述，采用状态机结构实现的读写功能-timing of the SDRAM read and write verilog language descr iption, a state machine structure to achieve read and write capabilities
ARM32ALU
- VHDL ARM 32位ALU的设计，基于Quaryus II平台-VHDL ARM 32 位 ALU design platform based on Quaryus II