资源列表
p2s
- 并串转换模块，内含有另个.vhd文件。一个是自己写的比较简单 另一个是参考的。-And the string conversion module, which contains another one. Vhd file. One is its relatively simple to write the other is the reference.
robertvision
- 基于FPGA的嵌入式机器人视觉识别系统模块源代码，也包括了所有硬件设计资料，是VERILOG格式-Embedded FPGA-based Robot Vision Recognition System module source code, including all hardware design information
xianshi
- spartan-3e lcd 字符滚动显示-spartan-3e lcd display characters rolling
FPGA_SDRAM_PCI
- 一个基于FPGA的PCI数据采集程序，包括SDRAM控制，PCI9054时序控制，开发语言verilog，开发环境quartus-FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartusII
nachosPipe
- nachos实验 操作系统实验 管程同步机制 消费者和生产者为例 改编原先版本中的一点小错误-nachos experimental test tube process operating system, consumers and producers as an example synchronization mechanism adapted the original version of a small error
usb_phy.tar
- Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a simplified UTMI interface. Currently doesn t do any error checking in the RX section [should probably check f
DDR3
- DDR3控制器，基于Altera平台，修改管教后直接可以下载进PFGA-DDR3 controller, based on Altera platform, modify the discipline can be downloaded directly into the PFGA
Xilinx-DS332-Spartan3
- FPGA应用及所用元器件手册和应用指导和示例3-Xilinx DS312 Spartan-3E FPGA
Based-on-FPGA-of-FIR-filters
- 基于FPGA的高阶FIR滤波器的设计，数字滤波器，分布式算法，CSD编码-Based on FPGA order FIR filters
rs232
- 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
m_vhdl
- 伪随机序列发生器的vhdl算法 设计一个伪随机序列发生器，采用的生成多项式为1+X^3+X^7。要求具有一个RESET端和两个控制端来调整寄存器初值（程序中设定好四种非零初值可选）-m sequence vhdl
DA
- FPGA控制DAC2807的源文件，Verilog。附有简单文档-FPGA control DAC2807 source, Verilog. A simple document