资源列表
madi_test1
- it is madi_to_adat converter... madi-multichannel audio digital interface adat- alesis digital audio tape
modelsim-win32-6.5-se_Crack
- modelsim-win32-6.5-se 解破文件。 功能全。可以用到2020年。可以用于VHDL,VERILOG, system C 等模拟及混合模拟。-modelsim-win32-6.5-se solutions broken files. full loaded. expired in 2020.. Can be used for VHDL, VERILOG, system C simulation and mixed simulation.
VHDL38decoder
- VHDL 语言实现 38译码器 文件中包括 程序 源代码 还有 testbench 测试程序-38 decoder VHDL language implementation, including program source code file, there are testbench test procedures
IEEE_Verilog_2001
- 原版IEEE verilog/VHDL 2001标准。-IEEE verilog/VHDL 2001
sobel
- Verilog代码实现Sobel算子，包括整个工程，仿真也有。。仿真表明该程序能实现Sobel 算子硬件实现-Verilog，Sobel Operator
I2C_IP_core
- I2C IP CORE 及开发文档, 网上搜集-I2C IP CORE and the development of documentation, on-line collection of
ILI9481IC-RGBPspi
- ILI9481IC RGB接口用spi点屏的方法，非常有用，申请站长加精-ILI9481IC RGB screen interface with spi point method, very useful application for owners of Concentrate
xapp687
- xapp687 code from xilinx web down load new-xapp687 vhdl from xilinx web
SSD1963-LCD-controllers-driver
- SSD1963 LCD controllers driver Module for Microchip Graphics Library
CF1
- 用VHDL语言实现的CF卡读写源代码，用quartus仿真通过，可实现正常的读写功能-VHDL language with the CF card reader source code, by using quartus simulation, the normal read and write capabilities can be realized
H.264verilog
- H.264编码的verilog源代码，希望各位研究研究，定会有收获的-H. 264 coding verilog source code, how to understand, hope that you study
MCU_FPGA
- 利用FPGA模拟SPI总线，可以与其他器件通信，比如MCU-FPGA simulation using SPI bus, you can communicate with other devices, such as the MCU