资源列表
beipin_top
- 次代码利用verilog HDL来描述的，可以实现2倍频功能，只是频率有一点误差。-Times verilog HDL code to describe the use of, 2 octave function can be achieved, but the frequency of a bit error.
state-machine
- 状态机，独热码实验，简单的Verilog语言设计For NJU，简单易行-State machine, one-hot code experiment, a simple Verilog language design For NJU, simple
X-HDL3.2.52
- vhdl和Verilog HDL相互转换的软件，很难找的一款-vhdl and Verilog HDL mutual conversion software, very difficult to find a
crc16
- crc16 module for SDIO DAT line calculation
ALU
- vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
synplify_ref_ug
- Synplify指导手册，内有vhdl、verilog、system verilog等综合详细指导，非常好的进阶资料喔！虽是英文的，但来自官方，绝对可靠喔！-Synplify guide, there vhdl, verilog, system verilog detailed, comprehensive guide, very good advanced data Oh! Although in English, but from the official, absolutely relia
FPGA_ep1c3
- ALTERA EP1C3 PROTEL 原理图与PCB-ALTERA EP1C3 PROTEL SCH AND PCB
sdram_ex9
- 深入浅出玩转FPGA代码 实验9sdram模块 基于EP1C3-Layman Fun FPGA code module based on experimental 9sdram EP1C3
8b10bverilog
- 基于verilogHDL语言的8b10通信变换。-verilog 8b10b
verilog_cookbook
- 本電子檔為 verilog cookbook,包含了通訊,影像,DSP等重要常用之verilog編碼,可作為工程師與初學者的參考手冊-The electronic file for verilog cookbook, includes communications, imaging, DSP and other important commonly used Verilog coding, can be used as engineer with the reference manual for
CLOCK6
- 基于SPARTAN-3E的数字电子时钟，采用1602LCD液晶显示屏显示，可显示时分秒。-SPARTAN-3E-based digital electronic clock, using 1602LCD LCD display, can display minutes and seconds.
LEDtest
- VHDL语言实现流水灯，通过按键控制显示方向，流水快慢-VHDL language flow lights show through the key control direction, flow speed