资源列表
ds18b20
- 单路DS18B20的verilog HDL 代码，精度为1℃无须转换数据，直接输出结果。占用300个LE资源。-Single DS18B20 the verilog HDL code, and an accuracy of 1 ℃ without converting the data, direct output. Occupy 300 LE resources.
19264LCD
- 192*64LCD显示资料，AIP31107，AIP31108，包含电路及驱动程序 -192* 64LCD display data, AIP31107, AIP31108, including circuit and drivers
arm9_fpga2_verilog
- ARM9的开发源代码，全套，很难得。 现全部共享。-ARM9 development of source code, a full set, it is difficult to get. Are all shared.
ZBT_SRAM
- 讲述如何利用PGA控制SRAM，用Verilog语言-Describes how to use the PGA control of SRAM, with the Verilog language
lab4showTAs
- 4 seg display, button debouncer, and controller for parking meter
verilog--maopao-paixu
- 用verilog实现的冒泡排序法 ，有testbench-Implemented using verilog bubble sort, there is testbench
coder_counter
- 增量式光电编码器计数器的FPGA实现程序,verilog3段式FSM,异步加载.-Incremental Optical Encoder counter program FPGA implementation, verilog3 struts FSM, asynchronous load.
ads7887
- 使用VerilogHDL语言实现ADS7887的时序功能。-Use VerilogHDL language ADS7887 timing function.
tlc549verilog
- tlc549的verilog HDL程序，希望对大家有用-tlc549 the verilog HDL program, we hope to be useful
SDRAMcontroller
- 西安电子科大的一片论文，主要讲述了SDRAM控制器的设计思路和方法-a paper about the information and descr iption of SDRAM controller
Walsh
- 利用ISE编写的产生WALSH码的verilog程序，简单易懂，稍稍修改就可以产生出自己想的8 16 32 64位的WALSH码-Prepared using ISE verilog code generated WALSH procedures, easy to understand, a little modification can generate their own like the 8,16，32，64-bit code WALSH. .
FFTbutter
- FFT的旋转因子算法和蝶形处理器VHDL代码实现-The rotation factor FFT butterfly processor algorithm and VHDL code