资源列表
verilog 源代码
- DE2 开发板 PS2 1602 LCD 串行 传输 显示
display
- VHDL写的万能数码管显示电路，在板子上下载跑过-VHDL write universal digital display circuit
Reconfigurablefliter
- 自己编写的SystemC源代码，拥有五级流水线的可重构图像滤波器，支持两种图像滤波算法，中值滤波和邻域平均滤波，支持算法配置-I have written SystemC source code, the reconfigurable image filter has a five-stage pipeline, supports two types of image filtering algorithms, median filtering and neighborhood average
chufa
- 四位有符号数字除法 用于basys2板子-divider divider for basys2 sjtu
6SMGplayer-test
- 6数数码管显示,CPLD EMP570 ALTERA-6SMGplayer test
xulie
- 序列检测器 用于BASYS2板子 教学用-this is a xulie checker
seg7
- FPGA环境下，利用VHDL编程实现七段数码管的显示功能。-FPGA environment, VHDL programming seven segment LED display function.
VerilogQuickRef_austin
- austin大学的一个verilog的quick referrence，包含最基础的语法简明手册。-A quick reference from austin
chap11
- 这是关于ＦＰＧＡ第十一节的实验代码可以参考 特权同学的深入玩转ＦＰＧＡ一书进行学习-This is the book depth Fun FPGA FPGA section XI of experimental code can refer to the privileged students learning
keybord
- FPGA环境下，用VHDL语言实现键盘扫描功能。-FPGA environment, VHDL language keyboard scan function.
Xilinx-Interrupt-Core
- 中断控制器，Xilinx公司应用于EDK中-Interrupt Core, Xilinx applied to EDK
jiaotongxinghaodeng
- 利用Verilog HDL语言编写的交通信号灯。通过led模拟信号灯，并通过数码管显示倒计时。-Traffic lights using Verilog HDL language. Led analog signal lights and digital display countdown.