资源列表
Barrel-shifter-design-report
- 实现变量移位操作的32-bit桶形移位寄存器；实现DES算法的数据路径设计及控制路径设计，有仿真和附录verilog代码 -Variable shift operations to achieve 32-bit barrel shifter implement the DES algorithm data path and control path design design
zixingche
- 自行车计程.rar-Bicycle odometer. Rar
code
- vhdl code for addition
VHDL-memory
- 存储器的VHDL描述，包括ROM,RAM,FIFO,stack等多种类型-design of memory by VHDL
verilog_HDL-basic-course
- verilog的精简教程，很容易看懂，包括了verilog的基本语法和一些基础例子-streamlining verilog tutorial, very easy to understand, including the basic verilog syntax and some basic examples
CNT12
- 通过一个简单完整而典型的12进制计数器的VHDL设计实例，来使大家初步了解用VHDL表达以及由此而引出的VHDL语言现象和语句规则。 让大家能够迅速的从整体上把握VHDL程序的基本结构和设计特点，达到快速入门的目的。 -Through a simple and complete and typical 12-band counter VHDL design examples, to make preliminary understanding of VHDL expression and the
mp3_decoder
- MP3解码的VHDL实现，包括霍夫曼解码等-VHDL realization of MP3 decoding, including Huffman decoding
sim.rar
- 通用的循环码编码器和（7,4）循环码译码器。采用VERILOG HDL编写，通过硬件验证。需使用modelsim 5.6仿真,Common cyclic code encoder and (7,4) cyclic code decoder. VERILOG HDL preparation used by the hardware verification. Need to use simulation modelsim 5.6
mp3_decoder
- 这是一个用VHDL语言编写的mp3编解码实现。-This is a use of VHDL language to achieve the mp3 codec.
CNT10_T
- 这是同步十进制计数器的源程序，有需要的同学可以参照一下！-This is a source synchronous decimal counter, needy students can refer to you!
726
- pci-726 采集卡编程源码 vb源码用于 采集卡-pci-726 采集卡编程源码
8255_HDL
- 8255为常用的接口类型。该代码主要描述用硬件语言实现8255并行接口，-it mainly describes how to finish a 8255 by HDL