资源列表
tapcontroller
- FPGA边界扫描时的TAP控制器，这个是工程文件，带有modelsim仿真-FPGA boundary scan when the TAP controller, this is a project file with modelsim simulation
cn5611
- LED驱动芯片CN5611，宽压输放，电流达1.2A。是LED照明方案佳选之一。-LED Driver IC CN5611, wide input voltage discharge current up to 1.2A. Is a good selection of LED lighting solutions.
minus
- 一位二进制全减器的设计，分别用原理图输入法和文本输入法，用分层设计的方法完成-A binary full subtractor design, respectively, schematic input and text input method, complete with a hierarchical design method
mos_des
- DES算法的verilog实现，可以研究下。-DES for Verilog。
PCM
- PCM码流时隙信号产生模块的VHDL实现-PCM stream slot signal generation module based on VHDL
seg71
- Verilog HDL编写的7段数码管显示程序。-7-segment LED display program written in Verilog HDL.
ad_DCT
- verilog 编程 有测试文档 基于查表结构实现 离散余弦变换dct 来源：opencores -Verilog Programming is based on the test documents Lookup structure for a discrete cosine transform Extra Source : opencores
DM642.rar
- 和众达DM642EVM上FPGA内的程序！,And public DM642EVM Tatsu procedures on FPGA!
scaler_proc
- 功能强大的视频处理相关的源代码。可以对视频画面进行缩小和放大。经过fpga验证可以被综合。-Powerful video processing-related source code. The video screen to zoom in and out. Fpga verification can be integrated.
work4dvf
- 数控分频器的设计数控分频器的功能就是当在输入端给定不同输入数据时，将对输入的时钟信号有不同的分频比，数控分频器就是用计数值可并行预置的加法计数器设计完成的，方法是将计数溢出位与预置数加载输入信号相接即可。
PLL
- FPGA实现的PLL程序，是一本书的例子程序，很有价值-PLL FPGA implementation procedures, is an example of a program book, great value
vhdlfifocodes
- VHDL First In first out codes which are synthesizable