资源列表
PAL760H_AR_ver1.0.4(E)
- 索尼CXD3172AR已调试好PAL制760H参数-Sony CXD3172AR 760H PAL system has been tested by parameters
4bit数据的加减乘除
- 一个很不错的例子,实现的是4bit的加减乘除,用modelsim做的仿真.-a very good example of the realization of the Band is the arithmetic, modelsim do with the simulation.
ADC_pico
- lkJHAKJCNKA A.LKJDLAMNCXLn akwjdNM.JDA. kjawdln ñ iajdlkjad alkjdkajd adjlkajsdlkn lqkwhdjlkalkdn añ lkjdlkajdlaj ñ klawjdlalknd añ lkjdñ laksjdncañ ñ alkjdñ qjekdja. lksajdñ la-lkJHAKJCNKA A.LKJDLAMNCXLn akwj
URAT_VHDL_procedures_and_simulation
- URAT VHDL程序与仿真。 1. 顶层程序与仿真 （1）顶层程序 --文件名：top.vhd。 --功能：顶层映射。 --最后修改日期：2004.3.24。-URAT VHDL procedures and simulation. 1. Top-level program and Simulation (1) top-level program- the file name: top.vhd.- Features: top-level mapping.- Last mod
MC34063
- 34063cad isspic 的库文件-34063cad isspic
uartdeverilog
- uart的编写 采用verilog 绝对可以用-uart prepared using verilog can definitely use
URAT_vhdl
- URAT VHDL程序与仿真, UART接收器-uart vhdl sample code
bank
- 实现输入，输出显示的银行前台显示，并对输入进行检错输出-Realization of the input, the output shows the bank front display
decoder_latest.tar
- mp3 decoder other language
zuizhongdianlu
- 清华大学数字电子技术课程EDA大作业一 二进制运算器及其数码管扫描显示电路(A Binary Operator and Digital Tube Scanning Display Circuit for EDA Homework of Digital Electronic Technology Course of Tsinghua University)
test1
- 该程序实现的是一个比较器，输入两个数字，进行比较，将结果输出(The program implements a comparator that inputs two numbers, compares them, and outputs the results.)