资源列表
FPGA(DDS)
- 采用FPGA来实现DDS，发出任意频率的三角波，方波或正弦波-Use FPGA to implement DDS, given any frequency triangle wave, square wave or sine wave
trivium
- It s trivium stream cipher
verilog_LCD12864
- LCD12864显示汉字 verilog 语言-LCD12864 display Chinese characters verilog language
FPGA-based-design-of-DPLL
- 采用VHDL设计的全数字锁相环电路设计，步骤以及一些详细过程介绍。-VHDL design using all-digital PLL circuit design, detailed process steps and some introduction.
lab2-2
- 4位二进制加法器，vhdl实现,外带译码器部分，清晰简洁，可读性好-4-bit binary adder, vhdl achieved decoder part of the bargain, clear and concise, readable good
VGA_pll
- 基于FPGA VGA 时钟的设计,关于pll的设计，可以参考一下-The PLL of vga use in FPGA
SEG_Dynamic
- 此实验中，实现了4连体共阴数码管的动态显示。被显示的数据是以2Hz的频率递增的。每个数码管中的小数点也会以2Hz的频率循环点亮。-This experiment, to achieve the 4 piece of negative dynamic digital display. The data is being displayed increasing the frequency of 2Hz. Each LED will take a decimal point in the cycle
cordic
- This paper proposes an efficient FPGA implementation of a common CORDIC architecture for circular and linear coordinates.it s very helpfull in the FPGA design about CORDIC!
UART
- uart程序包含了串口的VERILOG程序以及测试代码-The program contains the serial uart VERILOG program and test code
xapp928
- Digital Display Panel Reference Design
Modelsimbaiwen2
- 该资料里边集合了Modelsim的经典提问，是学习Modelsim仿真的好资料
full
- 利用VHDL程式及繪圖燒錄電路而達到按下按鈕能使LED自動變亮或變暗-Graphics programs and the use of VHDL circuit burner can press the button to achieve the LED light or darken automatically change