资源列表
dual ram
- 此文件是FPGA工程文件，包含了dualram的设计代码和testbench代码，使用了verilog hdl编写，仿真结果符合设计要求。
counter16
- 16位计数器，有使能功能，可以加减计数，有异步清零位，不用有限状态机-16-bit counter, enable function, you can add and subtract counting, asynchronous clear bits without a finite state machine
coding
- FPGA在通信上的运用：基于FPGA的VHDL的HDB3编码-FPGA communications: HDB3 encoding FPGA VHDL-based
drom
- FPGA rom硬件语言文件 用于输出正弦序列数字信号--- megafunction wizard: ROM: 1-PORT -- GENERATION: STANDARD -- VERSION: WM1.0 -- MODULE: altsyncram -- ============================================================ -- File Name: drom.vhd -- Megafunction Na
ep1c12_15_clock
- 数字钟设计：该程序完成了在Quartus Ⅱ上使用VHDL语言实现的24小时数字钟设计-Digital clock design: the process is complete Quartus Ⅱ a digital clock using VHDL language design
oc8051_____
- 基于vhdl的51单片机内核，里面的内容和代码都非常详细，值得看看。-Vhdl 51 MCU kernel inside the contents and code are very detailed, and worth a look.
c8051
- 51单片机，基于vhdl的ip核，这资料非常有用，结构性非常强，值得学习-51 microcontroller based vhdl ip core, this information is very useful, very strong structural worth learning。
zhentongbu
- ＦＰＧＡ在通信上的运用：基于VHDL的帧同步程序-Application of FPGA in communication: Based on VHDL frame synchronization procedures
vga_256
- FPGA的外围驱动之液晶显示屏（VGA），verilog程序显示256色-FPGA peripheral driving the liquid crystal display (VGA), Verilog program display 256 colors
kart2
- 利用FPGA在Led灯阵上实现小游戏，利用flash模块实现动态显示-Led run on FPGA
A3P600-PQG208
- Actel FPGA A3P600最小系统原理图，包含JTAG 、电源和封装 -Actel FPGA A3P600 minimum system schematics, including JTAG, power and packaging
FSK
- 推荐一个FSK解调工程，用Actel FPGA 实现的比较通用，VHDL 源代码。-Recommended Actel FPGA implementation FSK demodulator engineering, more generic, VHDL realization.