资源列表
assg-9-2-(trafic-light-controller)
- Traffic light Controller in vhdl using process statement and state disgram
ethernet_10ge_mac_latest.tar
- The 10GE MAC core is designed for easy integration with proprietary custom logic. It features a POS-L3 like interface for the datapath and a Wishbone compliant interface for management. The core was intentionally designed with a limited feature se
sockit_owm_latest.tar
- 1-wire master written in Verilog HDL, ready for integration into a FPGA or ASIC based SoC. A port of the 1-wire Public Domain Kit (version 3.10r2) from Maxim is also provided, with all the code required for integration into the Altera development
Elliptic_Curve_Group_latest.tar
- 椭圆曲线群的核心是计算在椭圆曲线群的两个元素的加入，并在椭圆曲线组相同的元素的加入。-The Elliptic Curve Group core is for computing the addition of two elements in the elliptic curve group, and the addition of identical elements in the elliptic curve group.
Tate_Bilinear_Pairing_latest.tar
- The Tate Bilinear Pairing core is for calculating Tate bilinear pairing especially on super-singular elliptic curve in affine coordinates defined over a Galois field , whose irreducible polynomial is . (For improving security, an irreducible po
tiny_tate_bilinear_pairing_latest.tar
- Tiny Tate Bilinear Pairing core is for calculating a special type of Tate bilinear pairing called reduced pairing.-Tiny Tate Bilinear Pairing core is for calculating a special type of Tate bilinear pairing called reduced pairing.
openmsp430_latest.tar
- The openMSP430 is a 16-bit microcontroller core compatible with TI s MSP430 family (note that the extended version of the architecture, the MSP430X, isn t supported by this IP). It is based on a Von Neumann architecture, with a single address s
Amber_ARM-compatible_core_latest.tar
- The Amber processor core is an ARM-compatible 32-bit RISC processor. The Amber core is fully compatible with the ARM ® v2a instruction set architecture (ISA) and is therefore supported by the GNU toolset. This older version of the ARM instr
t400u_latest.tar
- The T400u controller is an implementation of National s 4-bit COP400 microcontroller family architecture. It is intended to be used as a replacement for the original chip in SOCs recreating legacy systems. Its final target is to provide design va
t48u_latest.tar
- The T48 μController core is an implementation of the MCS-48 microcontroller family ar-chitecture. While being a controller core for SoC, it also aims for code-compatability and cycle-accuracy so that it can be used as a drop-in replacement for any
jiance1
- 3异或条件输出 周期的伪随机数生成器伪随机数 -The XOR output cycle pseudo-random number generator
final_PLL_130T_240Mhz
- Verilog 调试LMX2541，上板测试正常！单频输出，SPI方式控制。-Verilog debugging the LMX2541, on board test normal! Single-frequency output SPI control.