资源列表
ADC_3Channal
- Actel FPGA 3通道同时采样程序-Actel FPGA 3 Channel Sample Program
3-8
- 8实验八：利用语言实现3-8译码器、8实验八：利用语言实现3-8译码器-8 Experiment 8: the use of language to achieve 3-8 decoder 8 Experiment 8: language 3-8 decoder
25RS232TO_PC
- 25 FPGA通过RS232与电脑通讯，25 FPGA通过RS232与电脑通讯-25 FPGA via RS232 communicating with the computer via an RS232 computer communications, 25 FPGA
24LCD12864
- 26 FPGA-LCD12864液晶屏显示程序，26 FPGA-LCD12864液晶屏显示程序-26 FPGA-LCD 12864 LCD display program, LCD display program 26 FPGA-LCD 12864
2keyLED
- 2 FPGA按钮控制LED灯显示程序，2 FPGA按钮控制LED灯显示程序-2 FPGA button to control the LED lights display program FPGA button control LED lights display program
30IIC
- 30 FPGA通过接口IIC通讯，30 FPGA通过接口IIC通讯-30 FPGA through the interface IIC Communications, 30 FPGA through the interface IIC communication
FPGA_website
- FPGA开发相关的国内外经典网站，有许多值得参考的设计和开源的IP核-FPGA development at home and abroad classic website, there is much reference design and open source IP core
sd_verilog
- 关于sd卡的控制器verilog源代码，基于wishbone的总线协议
FIR
- fir数字滤波器，VHDL语言编程，先通过MATLAB计算得到参数。-fir digital filter VHDL language programming, first obtained by MATLAB calculated parameters.
dingshijishu.vhd
- 基于VHDL语言环境的定时计数程序，可进行简单的定时计数，供大家改进开发。-Simple timer count timer count program based on the VHDL language environment for improved development.
CDMA_DECODING
- CDMA encoding using VHDL
cc
- 基于FPGA的串口发送和接收程序，调试通过。-FPGA-based serial port to send and receive procedures.