资源列表
hdb3_verilog
- modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
1_ADDER
- vhdl addr
8051IP 核源代码（VHDL）
- 8051IP 核源代码-8051IP nuclear source code
clock
- 数字钟的实现，其中包括闰年的实现，万年历的实现。-It is very good, but it has something wrong.
dff9
- 9位的同步D触发器，带清零功能，可用于数字电路设计-9 synchronous D flip-flop with clear function
NAND_Controller_and_ECC_VHDL
- NAND_Controller_and_ECC_VHDL,做nandFlash控制器的朋友可以参考-NAND_Controller_and_ECC_VHDL, do nandFlash controller can refer to a friend
SSD1325_graf_lib
- Display Driver for OSRAM/univision/Data-Modul and other equal OLED 2,7" with SSD1325. C-functions fpr initialisation, font-defines, low-level-grphic-functions to draw and so on... Writing in C (IAR-comp.) for Atmel Mega128.
multi
- 实现了三种乘法器，可以进行性能比较，比较有较之-multi
button
- 按鍵功能描述，根據按下的按鍵顯示於FPGA版子上實現-button for fpga
NAND_IP
- Nand flash VHDL code and Nand flash verilog code
hdl
- 使用FPGA完成对直流无刷电机的控制的源代码-Use the FPGA to complete the brushless DC motor control source code
c54x_verilog
- TI 的TMS320C54X的DSP的芯片软核verilog源代码，可以帮助初学者深入了解该系列DSP片内资源核结构，值得参考！-TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!