资源列表
water-light
- 流水灯，很棒的，给大家一点启发的，很基础，大家看看的-Water lights, great, give you some inspiration, it is the foundation, we look at
CIEDE2000
- CIEDE2000计算实例，每个步骤都有，计算最新的色差公式-Ref: G. Sharma, W. Wu, E.N. Dalal,"THE CIEDE2000 COLOUR-DIFFERENCE FORMULA: Implementation Notes, Supplementary Test Data, and Mathematical Observations," submitted to COLOR RESEARCH AND APPLICATION, Jan 2004.
clock-design-code-for-reference
- 时钟设计参考代码（quartersII）-clock design code for reference
CMMBFRAMETEST
- 中国移动手机数字电视标准CMMB帧头检测及信息处理功能-Chinese digital TV standards CMMB mobile phone and information processing frame detection
1_ADDER
- ＣＰＵ内部的加法器用ｖｈｄｌ语言在可编程逻辑器件上的实现-Within the CPU is VHDL language addition in programmable logic devices for fulfillment
verilog_examples_of_Thomas
- Thomas课本中的verilog例子。Thomas的verilog在可编程期间领域很有名-Thomas textbook example of verilog. Verilog Thomas in the field during the famous programmable
dianzheng
- 33 8×8LED点阵屏仿电梯数字滚动显示 -33 8 × 8LED dot matrix screen digital imitation of the elevator 33 8 × 8LED scrolling dot matrix display screen scrolling digital display fake elevator
designrequirementbyvhdl
- 08EE06EDA 实验 4（VHDL 状态机设计_序列检测器）6/7/2008-design thesis requirement by vhdl
traffic
- 此代码为多路交通灯控制，由红黄蓝分别来显示 其中定时可选 采用简单逻辑来实现
cnt6
- 基于vhdl的6进制计数器模块，实现0-5计数
ADDER
- 基于vhdl硬件描述语言设计的加法器电路 -Hardware descr iption language design based on vhdl adder circuit
Washing-machine
- quartus 洗衣机系统 可运行，在http://www.altera.com/ 有可免费使用的 软件-quartus 2 ，