资源列表
hsk4571_cuankou
- 串口通信SCI VHDL实现，在QUATTUS||9.0下编写，可在9.0及以上版本运行并下载，芯片为Altera的Cyclone3 EP3C8T1-Serial communication SCI VHDL realize, in QUATTUS | | 9.0 under preparation, can be run in the 9.0 and above versions and download, chips for Altera' s Cyclone3 EP3C8T144
hsk4571_sgna_generator
- 信号发生器的VHDL实现，可调节波形及频率，方波、锯齿波、三角波等，在QUATTUS||9.0下编写，可在9.0及以上版本运行并下载，芯片为Altera的Cyclone3 EP3C8T1-Signal Generator VHDL implementation, adjustable waveform and frequency, square wave, sawtooth, triangle, etc., in QUATTUS | | 9.0 under preparation, can be
VHDL
- 数字电路实验程序代码打包下载 版本 宁波大学学年数字电路实验 VHDl编程 部分 -Digital circuit experiment program code package download version Ningbo University academic year programming section VHDl digital circuit experiment
FPGA-
- FPGA实现串行接口 RS232,包括RS232是怎样工作的，如何产生需要的波特率，发送模块，接收模块，应用实例-FPGA Implementation of serial interface RS232, RS232, including how it works, how to produce the desired baud rate, transmit module, receiver module, application examples
NOIS-II_AES
- 基于NOIS II的AES加解密系统 完整的工程文件 -NOIS II-based AES encryption and decryption of a complete project file system
project2_1
- 3:8译码器，HDl verilog语言编写，能在DE2上运行-3:8 decoder, HDl verilog language, able to run on the DE2
project2_2
- 7段译码管，用于显示数字，HDl verilog语言编写，能在DE2上运行-7 segment decoder tube used to display numbers, HDl verilog language, can be run on the DE2
project3_1
- 逐次进位加法器，HDl verilog语言编写，能在DE2上运行-Successive carry adder, HDl verilog language, able to run on the DE2
project4_1
- D触发器门级实现，有异步复位置位，HDl verilog语言编写，能在DE2上运行-D flip-flop gate-level implementation, there are asynchronous Reset_Set, HDl verilog language, able to run on the DE2
go-to-the-digital-world-of-FPGA
- 走进FPGA的数字世界，让我们更浅显易懂的了解FPGA，了解数字。-FPGA into the digital world, so that we are more easy to understand to understand FPGA, to understand numbers.
fpga
- 自己写的一个基于quartus ii12.0的一个建立工程及通过modelsim仿真的一个图文教程。提供大家参考。-To write a quartus ii12.0-based engineering and through establishment of a modelsim simulation of a graphic tutorial. Provide your reference.
source
- 多个verilog的基础例子，初学verilog者必备，里面包含源文件及pdf文件的总述。-The basis of several verilog examples of the essential beginner verilog, which contains the source files and pdf files Overview.