资源列表
qdr2_top
- xinlinx QDR2 contoller for verilog
eqm
- verilog eqm for xinlinx
map
- map verilog for xilinx
pprx
- pprx verilog for xilinx
Moore
- VerilogHDL语言实现的Moore 序列检测器-VerilogHDL language of Moore sequence detector
Mealy
- VerilogHDL语言实现的Mealy序列检测器-VerilogHDL language of Mealy sequence detector
qiang-da-qi
- VerilogHDL 语言实现的四路抢答器-VerilogHDL language Quad Responder
shift-register
- VerilogHDL语言实现的普通寄存器-VerilogHDL language common register
FPGA_Verilog-
- 关于VHDL程序设计的书籍，经典免费，书中主要描述 Verilog 语音的介绍以及项目例程-About VHDL programming classic books, free of charge, the book describes the Verilog voice introduction and project routines
LATTICE_ASYNFIFO
- LATTICE FPGA FIFO 程序例程，工程详细，全部源代码上传 -LATTICE FPGA FIFO routine, detailed engineering, all source code uploaded
LATTICE_synplifyPro_basic_flow
- LATTICE_synplifyPro_examples_basic_flow.zip,LATTICE 同步工程源码-LATTICE_synplifyPro_examples_basic_flow.zip，LATTICE simultaneous engineering source
LATTICE_synplifyPro_basic_flow
- LATTICE 同步（ synplifyPro）basic_flow 源码-LATTICE synchronization (synplifyPro) basic_flow source