资源列表
digitalvoltemterdesign
- FPGA的关于数字电压计的设计源代码，已验证可行-FPGA on the digital voltmeter design source code, has been proven feasible
fifo_csm
- 一个先进先出的描述代码，用于实现先入先出的操作-first in first out
NiosIISPI
- NiosII上spi总线的设计，源代码简洁易懂，有助于学习者读懂和移植-NiosII on spi bus design, source code easier to understand, to help learners understand and transplantation
I2C_control
- I2C两线式串行总线的控制端的verilog源代码，经过编译和modelsim仿真后是正确的！-Two-wire I2C serial bus control terminal verilog source code, after compiling and modelsim simulation is correct!
CT74125
- 一个四总线缓冲器设计，亲测好使。适合初学者。FPGA开发-A four-bus buffer design, pro-test so. Suitable for beginners. FPGA Development
running-water-led
- 流水灯程序，采用组合逻辑。内有仿真文件。是FPGA开发必须学的一个程序-Light water program, using a combination of logic. There simulation files. Is a program FPGA development must learn
FPGA
- FPGA很不错的入门教学，并有大量实例以帮助学习。-FPGA very good introductory teaching, and there are a lot of examples to help learning.
seg3uart
- FPGA驱动串口，实现FPGA实验板串口与pc机的通信，支持各种波特率的串口自发自收功能-FPGA-driven serial port, serial port to communicate with the FPGA experimental board pc machine supports a variety of serial port baud rate of spontaneous self-closing feature
mips32
- PROJECT for misp32 microprocessor pipline
AES
- AES算法加解密过程的Verilog代码，包括测试文件，通过FPGA验证。-AES algorithm encryption and decryption process Verilog code, including test files through the FPGA verification.
I2S
- 本代码提供一种音频I2S读取数据的verilog代码，并且向fifo写入-This code provides an I2S audio data is read verilog code, and write to the fifo
DE1-verilog
- Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码，包括ADC，音频处理，视频输出等，供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.