资源列表
ALU
- ALU logic using Verilog
sdram_test
- FPGA测试程序，使用XC3S250E对SDRAM进行读写的测试程序，SDRAM使用的是HY57V281620， 大小为128M。-FPGA test procedure, the use of XC3S250E SDRAM read and write on the test procedure, SDRAM using HY57V281620, size of 128M.
470P2F07
- sqrt root using verilog
state-machine
- 状态机，独热码实验，简单的Verilog语言设计For NJU，简单易行-State machine, one-hot code experiment, a simple Verilog language design For NJU, simple
crc16
- crc16 module for SDIO DAT line calculation
synplify_ref_ug
- Synplify指导手册，内有vhdl、verilog、system verilog等综合详细指导，非常好的进阶资料喔！虽是英文的，但来自官方，绝对可靠喔！-Synplify guide, there vhdl, verilog, system verilog detailed, comprehensive guide, very good advanced data Oh! Although in English, but from the official, absolutely relia
sdram_ex9
- 深入浅出玩转FPGA代码 实验9sdram模块 基于EP1C3-Layman Fun FPGA code module based on experimental 9sdram EP1C3
LEDtest
- VHDL语言实现流水灯，通过按键控制显示方向，流水快慢-VHDL language flow lights show through the key control direction, flow speed
fenpin
- FPGA的一个分频程序，FPGA时钟频率问100MHz，进行100000000分频。-A sub-frequency program FPGA, FPGA clock frequency asked 100MHz, for 100 million frequency.
LIP1201CORE_dll
- Verilog DLL sOURCE CODE
Dac
- 这是一款用VHDL语言编写的对外部DA芯片的控制程序，所用DA转换芯片是TI公司的TLC5615.-This is a VHDL languages used on the external DA chip control procedures, using DA converter chip is TI
tlk1221jiaoyan_k
- 采用8B/10B编码方式，以不同的模式插入K28.5码进行数据校验，验证tlk1221芯片的数据传输是否正确，观察收发数据是否一致。-To check the data which is transceived by the way of 8B/10B coder/decoder by asserting K28.5 code in different mode and to observe that whether these data have been missed in the tran