资源列表
Fredevider_n
- 任意N偶数倍频率分频器VHDL语言，编译器MAX_PLUS2-Any even multiple of the frequency divider N VHDL language, compiler MAX_PLUS2
psk
- 应用verilog语言编写实现二元相移键控调制过程-Application verilog language to achieve binary phase shift keying modulation
SystemC_Modeling
- SystemC建模实例精华,可参考文档《A SystemC Primer》-systemC modeling examples
STC60S2_UART
- STC12C5A60S2获取AD转换数据存入内置的eeprom,并将其通过串口传送给电脑,-STC60S2 for AD conversion data into the built-in eeprom, and send to the computer through the serial port
wb_conbus
- wb_conbus设计源代码,需要的下载可以-wb_conbus design source code, need to download can be
Learning-VHDL-with-example
- 学习VHDL，从入门到精通，包括学习的书籍资料和相关例程分析。-Learning VHDL, from entry to the master, including the study of books, information and case studies.
turbodecoder
- 用vhdl实现turbo码的迭代解码，转某N人的程序-Using vhdl implementation of iterative decoding turbo codes, transfer of a person' s procedures for N
UART_VHDL_Verilog_Lattice
- 本压缩包中含有串口程序的VHDL,Verilog，Lattice三种版本的代码，均已实现。在压缩包中，含有非常详细的串口的实现规格。各种版本的代码中，含有完成的源文件，测试文件，模拟文件。-This compressed package contains serial process VHDL, Verilog, Lattice three versions of the code, have been achieved. In the compressed package, contains
FlashROM
- actel fpga fusion kit 使用的flashrom操作-actel fpga fusion kit operation using flashrom
FPGAuartdebug
- FPGA串口界面调试程序,用VHDL语言实现-FPGA serial debugger interface, using VHDL language implementation
eeprom
- VERILOG实际例程，非常适合初学者学习-VERILOG the actual routine, ideal for beginners to learn
DE2_TV
- 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌 入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案， 针对视频解码芯片 ADV7181B，实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII 系列FPGA(EP2C35)上实现。结果显示本设计具有速度高、成本低、易于集成等优点-Analysis of a variety of