资源列表
VerilogUart
- UART 串口通信模块，Verilog 实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-UART serial communication module, Verilog implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
txmit
- uart设计，发送模块，无校验位。先输出一个低电平的起始位，然后从低到高输出8个数据位，接着是可选的奇偶校验位（这里没有），最后是高电平的停止位。-uart design, transmit module, no parity. First output of the start bit of a low level, and low to high output 8 data bits, then the optional parity bit (there is no), the last
Demo_03_VGA
- 基于FPGA的的VGA程序，由于开发板的原因，只能显示9种颜色，，用户可以自由拓展-FPGA-based VGA-program, because of the development board, can only display 9 colors,, users can freely expand
c5
- 加法器、乘法器、除法器、DDS函数信号发生器等FPGA实现-Some signal generator build by FPGA！
Quartus-II-Handbook
- Quartus II的handbook中英文对照，对掌握quartus有很大帮助。-Quartus II faced, in both Chinese and English are of great help to grasp the Quartus.
FPGA
- 是一位FPGA大牛写的FPGA杂谈，详细介绍了玩转FPGA的流程和他对FPGA的理解，语言风趣幽默，见解独到深刻。-Is written by a FPGA and FPGA gossip, embracing the FPGA was introduced in detail the process and his understanding of the FPGA, humorous language, independent-minded.
Xilinx_CORDIC
- 非常详细地描述了cordic算法的原理和实现，讲解通俗易懂，有别人旁注的笔记。-Very detailed describes the principle and realization of cordic algorithm, easy to understand, there are others marginal notes
sin_cos_module
- Verilog实现的cordic算法的计算sin，cos值得模块，使用rom，代码简洁有效。-Verilog implementation of the cordic algorithm of computing the sine and cosine worth module, use of ROM, the code is concise and effective.
nios_ruanhe_spi_3
- 这是我自己写的一个摄像头数据存储SD卡程序，quartus的verilog编写，摄像头采用自己添加的外设接口，数据采用dma采集，SD用的是软件自带的SPI内核以及znFAT的文件系统。帧率我没有测，有兴趣的可以测测，初学者可以参考学习，写的代码有点乱，如果有不懂的可以和联系。-This is what I wrote it myself a camera, SD card data storage program, quartus the verilog write, add their ow
matrix-inversion
- 基于Systolic的上三角矩阵求逆的实现，含有详细的verilog代码，并给出详细的注释-upper triangular matrix inversion
Cordic-arithmetic-pipeline
- FPGA实现基于Cordic算法的流水线结构设计，相关verilog语言代码-FPGA to realize the Cordic code
pingzongtest
- 频率综合器的FPGA的设计和源代码以及测试-Frequency synthesizer FPGA design and source code